Lines Matching +full:0 +full:xf8
23 #define PCI_ACCESS_READ 0
33 /* we support slot from 0 to 15 dev_fn & 0x68 (AD29) is the in ltq_pci_config_access()
35 if ((bus->number != 0) || ((devfn & 0xf8) > 0x78) in ltq_pci_config_access()
36 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68)) in ltq_pci_config_access()
43 LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3); in ltq_pci_config_access()
56 cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; in ltq_pci_config_access()
60 cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; in ltq_pci_config_access()
65 if (((*data) == 0xffffffff) && (access_type == PCI_ACCESS_READ)) in ltq_pci_config_access()
68 return 0; in ltq_pci_config_access()
74 u32 data = 0; in ltq_pci_read_config_dword()
80 *val = (data >> ((where & 3) << 3)) & 0xff; in ltq_pci_read_config_dword()
82 *val = (data >> ((where & 3) << 3)) & 0xffff; in ltq_pci_read_config_dword()
92 u32 data = 0; in ltq_pci_write_config_dword()
102 data = (data & ~(0xff << ((where & 3) << 3))) | in ltq_pci_write_config_dword()
105 data = (data & ~(0xffff << ((where & 3) << 3))) | in ltq_pci_write_config_dword()