Lines Matching +full:0 +full:x1f200000
25 #define BOOT_REG_BASE (KSEG1 | 0x1F200000)
26 #define BOOT_PW1_REG (BOOT_REG_BASE | 0x20)
27 #define BOOT_PW2_REG (BOOT_REG_BASE | 0x24)
28 #define BOOT_PW1 0x4C545100
29 #define BOOT_PW2 0x0051544C
31 #define WDT_REG_BASE (KSEG1 | 0x1F8803F0)
32 #define WDT_PW1 0x00BE0000
33 #define WDT_PW2 0x00DC0000
40 ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */ in machine_restart()
41 ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */ in machine_restart()
42 ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */ in machine_restart()
47 (0x3 << 26) | /* PWL */ in machine_restart()
48 (0x2 << 24) | /* CLKDIV */ in machine_restart()
49 (0x1 << 31) | /* enable */ in machine_restart()
72 return 0; in mips_reboot_setup()