Lines Matching +full:inter +full:- +full:processor

1 // SPDX-License-Identifier: GPL-2.0-or-later
33 #include <asm/processor.h>
35 #include <asm/r4k-timer.h>
36 #include <asm/mips-cps.h>
56 /* representing the core map of multi-core chips of each logical CPU */
145 	/* Re-calculate the mask */
366 	mp_ops->init_secondary();
408 	 * irq will be enabled in ->smp_finish(), enabling it too early
412 	mp_ops->smp_finish();
443 	current_thread_info()->cpu = 0;
444 	mp_ops->prepare_cpus(max_cpus);
457 	if (mp_ops->prepare_boot_cpu)
458 		mp_ops->prepare_boot_cpu();
466 	return mp_ops->boot_secondary(cpu, tidle);
473 	err = mp_ops->boot_secondary(cpu, tidle);
481 		return -EIO;
551  * multithreaded address spaces, inter-CPU interrupts have to be sent.
552  * Another case where inter-CPU interrupts are required is when the target
563 	if (atomic_read(&mm->mm_users) == 0)
570 		 * No need to worry about other CPUs - the ginvt in
573 	} else if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
598 	local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
603 	struct mm_struct *mm = vma->vm_mm;
623 	} else if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
634 		int exec = vma->vm_flags & VM_EXEC;
655 	local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
672 	local_flush_tlb_page(fd->vma, fd->addr1);
683 		write_c0_memorymapid(cpu_asid(0, vma->vm_mm));
690 	} else if ((atomic_read(&vma->vm_mm->mm_users) != 1) ||
691 		   (current->mm != vma->vm_mm)) {
709 			if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
710 				set_cpu_context(cpu, vma->vm_mm, 1);
735 	if (mp_ops->cleanup_dead_cpu)
736 		mp_ops->cleanup_dead_cpu(cpu);