Lines Matching refs:mipspmu
94 static struct mips_pmu mipspmu; variable
329 for (i = mipspmu.num_counters - 1; i >= 0; i--) { in mipsxx_pmu_alloc_counter()
354 WARN_ON(idx < 0 || idx >= mipspmu.num_counters); in mipsxx_pmu_enable_event()
400 WARN_ON(idx < 0 || idx >= mipspmu.num_counters); in mipsxx_pmu_disable_event()
431 if (left > mipspmu.max_period) { in mipspmu_event_set_period()
432 left = mipspmu.max_period; in mipspmu_event_set_period()
436 local64_set(&hwc->prev_count, mipspmu.overflow - left); in mipspmu_event_set_period()
442 mipspmu.write_counter(idx, mipspmu.overflow - left); in mipspmu_event_set_period()
458 new_raw_count = mipspmu.read_counter(idx); in mipspmu_event_update()
541 WARN_ON(idx < 0 || idx >= mipspmu.num_counters); in mipspmu_del()
596 if (mipspmu.irq >= 0) { in mipspmu_get_irq()
598 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq, in mipspmu_get_irq()
602 "mips_perf_pmu", &mipspmu); in mipspmu_get_irq()
605 mipspmu.irq); in mipspmu_get_irq()
624 if (mipspmu.irq >= 0) in mipspmu_free_irq()
625 free_irq(mipspmu.irq, &mipspmu); in mipspmu_free_irq()
646 (void *)(long)mipspmu.num_counters, 1); in hw_perf_event_destroy()
726 if ((*mipspmu.general_event_map)[idx].cntr_mask == 0) in mipspmu_map_general_event()
728 return &(*mipspmu.general_event_map)[idx]; in mipspmu_map_general_event()
748 pev = &((*mipspmu.cache_event_map) in mipspmu_map_cache_event()
842 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
844 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
846 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
848 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
850 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
852 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
854 mipspmu.write_counter(3, 0); in loongson3_reset_counters()
858 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
860 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
862 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
864 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
866 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
868 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
870 mipspmu.write_counter(2, 0); in loongson3_reset_counters()
874 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
876 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
878 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
880 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
882 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
884 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
886 mipspmu.write_counter(1, 0); in loongson3_reset_counters()
890 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
892 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
894 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
896 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
898 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
900 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
902 mipspmu.write_counter(0, 0); in loongson3_reset_counters()
919 mipspmu.write_counter(3, 0); in reset_counters()
923 mipspmu.write_counter(2, 0); in reset_counters()
927 mipspmu.write_counter(1, 0); in reset_counters()
931 mipspmu.write_counter(0, 0); in reset_counters()
1488 pev = mipspmu.map_raw_event(event->attr.config); in __hw_perf_event_init()
1529 hwc->sample_period = mipspmu.max_period; in __hw_perf_event_init()
1549 int ctr = mipspmu.num_counters; in pause_local_counters()
1565 int ctr = mipspmu.num_counters; in resume_local_counters()
1577 unsigned int counters = mipspmu.num_counters; in mipsxx_pmu_handle_shared_irq()
1604 counter = mipspmu.read_counter(n); in mipsxx_pmu_handle_shared_irq()
1605 if (!(counter & mipspmu.overflow)) in mipsxx_pmu_handle_shared_irq()
1915 mipspmu.map_raw_event = mipsxx_pmu_map_raw_event; in init_hw_perf_events()
1919 mipspmu.name = "mips/24K"; in init_hw_perf_events()
1920 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1921 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1924 mipspmu.name = "mips/34K"; in init_hw_perf_events()
1925 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1926 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1929 mipspmu.name = "mips/74K"; in init_hw_perf_events()
1930 mipspmu.general_event_map = &mipsxxcore_event_map2; in init_hw_perf_events()
1931 mipspmu.cache_event_map = &mipsxxcore_cache_map2; in init_hw_perf_events()
1934 mipspmu.name = "mips/proAptiv"; in init_hw_perf_events()
1935 mipspmu.general_event_map = &mipsxxcore_event_map2; in init_hw_perf_events()
1936 mipspmu.cache_event_map = &mipsxxcore_cache_map2; in init_hw_perf_events()
1939 mipspmu.name = "mips/P5600"; in init_hw_perf_events()
1940 mipspmu.general_event_map = &mipsxxcore_event_map2; in init_hw_perf_events()
1941 mipspmu.cache_event_map = &mipsxxcore_cache_map2; in init_hw_perf_events()
1944 mipspmu.name = "mips/P6600"; in init_hw_perf_events()
1945 mipspmu.general_event_map = &mipsxxcore_event_map2; in init_hw_perf_events()
1946 mipspmu.cache_event_map = &mipsxxcore_cache_map2; in init_hw_perf_events()
1949 mipspmu.name = "mips/I6400"; in init_hw_perf_events()
1950 mipspmu.general_event_map = &i6x00_event_map; in init_hw_perf_events()
1951 mipspmu.cache_event_map = &i6x00_cache_map; in init_hw_perf_events()
1954 mipspmu.name = "mips/I6500"; in init_hw_perf_events()
1955 mipspmu.general_event_map = &i6x00_event_map; in init_hw_perf_events()
1956 mipspmu.cache_event_map = &i6x00_cache_map; in init_hw_perf_events()
1959 mipspmu.name = "mips/1004K"; in init_hw_perf_events()
1960 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1961 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1964 mipspmu.name = "mips/1074K"; in init_hw_perf_events()
1965 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1966 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1969 mipspmu.name = "mips/interAptiv"; in init_hw_perf_events()
1970 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1971 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1974 mipspmu.name = "mips/loongson1"; in init_hw_perf_events()
1975 mipspmu.general_event_map = &mipsxxcore_event_map; in init_hw_perf_events()
1976 mipspmu.cache_event_map = &mipsxxcore_cache_map; in init_hw_perf_events()
1979 mipspmu.name = "mips/loongson3"; in init_hw_perf_events()
1985 mipspmu.general_event_map = &loongson3_event_map1; in init_hw_perf_events()
1986 mipspmu.cache_event_map = &loongson3_cache_map1; in init_hw_perf_events()
1990 mipspmu.general_event_map = &loongson3_event_map2; in init_hw_perf_events()
1991 mipspmu.cache_event_map = &loongson3_cache_map2; in init_hw_perf_events()
1995 mipspmu.general_event_map = &loongson3_event_map3; in init_hw_perf_events()
1996 mipspmu.cache_event_map = &loongson3_cache_map3; in init_hw_perf_events()
2004 mipspmu.name = "octeon"; in init_hw_perf_events()
2005 mipspmu.general_event_map = &octeon_event_map; in init_hw_perf_events()
2006 mipspmu.cache_event_map = &octeon_cache_map; in init_hw_perf_events()
2007 mipspmu.map_raw_event = octeon_pmu_map_raw_event; in init_hw_perf_events()
2010 mipspmu.name = "BMIPS5000"; in init_hw_perf_events()
2011 mipspmu.general_event_map = &bmips5000_event_map; in init_hw_perf_events()
2012 mipspmu.cache_event_map = &bmips5000_cache_map; in init_hw_perf_events()
2020 mipspmu.num_counters = counters; in init_hw_perf_events()
2021 mipspmu.irq = irq; in init_hw_perf_events()
2026 mipspmu.max_period = (1ULL << 47) - 1; in init_hw_perf_events()
2027 mipspmu.valid_count = (1ULL << 47) - 1; in init_hw_perf_events()
2028 mipspmu.overflow = 1ULL << 47; in init_hw_perf_events()
2031 mipspmu.max_period = (1ULL << 63) - 1; in init_hw_perf_events()
2032 mipspmu.valid_count = (1ULL << 63) - 1; in init_hw_perf_events()
2033 mipspmu.overflow = 1ULL << 63; in init_hw_perf_events()
2035 mipspmu.read_counter = mipsxx_pmu_read_counter_64; in init_hw_perf_events()
2036 mipspmu.write_counter = mipsxx_pmu_write_counter_64; in init_hw_perf_events()
2039 mipspmu.max_period = (1ULL << 31) - 1; in init_hw_perf_events()
2040 mipspmu.valid_count = (1ULL << 31) - 1; in init_hw_perf_events()
2041 mipspmu.overflow = 1ULL << 31; in init_hw_perf_events()
2042 mipspmu.read_counter = mipsxx_pmu_read_counter; in init_hw_perf_events()
2043 mipspmu.write_counter = mipsxx_pmu_write_counter; in init_hw_perf_events()
2049 "CPU, irq %d%s\n", mipspmu.name, counters, counter_bits, irq, in init_hw_perf_events()