Lines Matching +full:0 +full:xff400000
35 * it to resume execution at 0x8000_0200 (!BEV IV vector) when it is
37 * it to a more convenient place: BMIPS_WARM_RESTART_VEC @ 0x8000_0380.
54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */
55 li k0, 0xff400000
60 andi k1, 0x8000
63 li k1, 0xa0080000
64 sw k1, 0(k0)
78 * entire function gets copied to 0x8000_0000.
100 /* if we're not on core 0, this must be the SMP boot signal */
134 andi k0, 0xff00
146 * running on TP0, can not be core 0 (the boot core).
174 li k0, 0x30000000
180 ori k0, 0x07
181 xori k0, 0x04
185 andi k0, 0xff00
191 li k0, 0x80000000
192 li k1, 0x80010000
197 1: cache Index_Store_Tag_I, 0(k0)
212 lw k0, 0(k0)
234 lw sp, 0(k0)
236 lw gp, 0(k0)
260 ori k0, 0x01
261 xori k0, 0x01
280 andi t2, t0, 0xff00
285 andi t0, 0xff
292 li t1, 0x1ff0
309 li t1, 0x01ff