Lines Matching +full:no +full:- +full:insert +full:- +full:detect

1 /* SPDX-License-Identifier: GPL-2.0-only */
7  * II-A of the MIPS Architecture Reference Manual, which can be found here:
9  *   https://www.mips.com/?do-download=the-mips64-instruction-set-v6-06
27  *      actually need to complete - they just need to get far enough that all
43  * No sync instruction at all; used to allow code to nullify the effect of the
46 #define __SYNC_none	-1
121  *    be executed after the LL - this is the reordering case.
130  *    of the LL-SC loop, for example an exit upon value mismatch in cmpxchg()
132  *    execution of memory accesses from outside of the LL-SC loop.
140  * such that the Invalidate of a competing LL-SC goes 'missing' and SC
159  * and that the assembler evaluates '==' as 0 or -1, not 0 or 1.
162 # define __SYNC_rpt(type)	(1 - (type == __SYNC_wmb))
169  * reason is non-zero.
171  * In future we have the option of emitting entries in a fixups-style table
173  * when we detect at runtime that we're running on a CPU that doesn't need
178 	.if	(( _type ) != -1) && ( _reason );		\
193  * Preprocessor magic to expand macros used as arguments before we insert them