Lines Matching +full:5 +full:w
38 * - channels 5-7 are word - addresses/counts are for physical words
39 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
42 * - page registers for 5-7 don't use data bit 0, represent 128K pages
58 * Address mapping for channels 5-7:
67 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
73 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
104 #define DMA1_CMD_REG 0x08 /* command register (w) */
106 #define DMA1_REQ_REG 0x09 /* request register (w) */
107 #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
108 #define DMA1_MODE_REG 0x0B /* mode register (w) */
109 #define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
111 #define DMA1_RESET_REG 0x0D /* Master Clear (w) */
113 #define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
115 #define DMA2_CMD_REG 0xD0 /* command register (w) */
117 #define DMA2_REQ_REG 0xD2 /* request register (w) */
118 #define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
119 #define DMA2_MODE_REG 0xD6 /* mode register (w) */
120 #define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
122 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */
124 #define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
233 case 5: in set_dma_page()
268 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.