Lines Matching +full:isa +full:- +full:extensions
1 /* SPDX-License-Identifier: GPL-2.0 */
18 +----------------+----------------+----------------+----------------+
20 +----------------+----------------+----------------+----------------+
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
92 #define PRID_IMP_LOONGSON_32 0x4200 /* Loongson-1 */
95 #define PRID_IMP_LOONGSON_64R 0x6100 /* Reduced Loongson-2 */
96 #define PRID_IMP_LOONGSON_64C 0x6300 /* Classic Loongson-2 and Loongson-3 */
97 #define PRID_IMP_LOONGSON_64G 0xc000 /* Generic Loongson-2 and Loongson-3 */
189 #define PRID_IMP_XBURST_REV1 0x0200 /* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */
190 #define PRID_IMP_XBURST_REV2 0x0100 /* XBurst®1 with MXU2.0 SIMD ISA */
191 #define PRID_IMP_XBURST2 0x2000 /* XBurst®2 with MXU2.1 SIMD ISA */
252 #define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
269 * 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
270 * have switched to use the 8-bits as 3:3:2 bitfield with the last field as
281 * +---------------------------------+----------------+----------------+
283 * +---------------------------------+----------------+----------------+
335 * ISA Level encodings
362 #define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
363 #define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
376 #define MIPS_CPU_INCLUSIVE_CACHES BIT_ULL(17) /* P-cache subset enforced */
388 #define MIPS_CPU_RIXIEX BIT_ULL(29) /* CPU has unique exception codes for {Read, Execute}-Inhibit …
395 #define MIPS_CPU_FTLB BIT_ULL(37) /* CPU has Fixed-page-size TLB */
398 #define MIPS_CPU_VP BIT_ULL(40) /* MIPSr6 Virtual Processors (multi-threading) */
419 #define MIPS_CPU_MM_SYSAD BIT_ULL(58) /* CPU supports write-through SysAD Valid merge */
420 #define MIPS_CPU_MM_FULL BIT_ULL(59) /* CPU supports write-through full merge */
421 #define MIPS_CPU_MAC_2008_ONLY BIT_ULL(60) /* CPU Only support MAC2008 Fused multiply-add instructi…
430 #define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */
439 #define MIPS_ASE_LOONGSON_MMI 0x00000800 /* Loongson MultiMedia extensions Instructions */
441 #define MIPS_ASE_LOONGSON_EXT 0x00002000 /* Loongson EXTensions */
442 #define MIPS_ASE_LOONGSON_EXT2 0x00004000 /* Loongson EXTensions R2 */