6  * Copyright (C) 2004-2017 Cavium, Inc.
18 #include <asm/octeon/cvmx-helper-board.h>
24 #include <asm/octeon/cvmx-uctlx-defs.h>
78 	if (dev->of_node) {  in octeon2_usb_clocks_start()
82 		uctl_node = of_get_parent(dev->of_node);  in octeon2_usb_clocks_start()
88 					 "refclk-frequency", &clock_rate);  in octeon2_usb_clocks_start()
90 			dev_err(dev, "No UCTL \"refclk-frequency\"\n");  in octeon2_usb_clocks_start()
95 					    "refclk-type", &clock_type);  in octeon2_usb_clocks_start()
122 	/* Step 3: Configure the reference clock, PHY, and HCLK */  in octeon2_usb_clocks_start()
131 	/* 3a */  in octeon2_usb_clocks_start()
141 	/* 3b */  in octeon2_usb_clocks_start()
160 	/* 3c */  in octeon2_usb_clocks_start()
169 	case 3:  in octeon2_usb_clocks_start()
195 	/* 3d */  in octeon2_usb_clocks_start()
199 	/* 3e: delay 64 io clocks */  in octeon2_usb_clocks_start()
203 	 * Step 4: Program the power-on reset field in the UCTL  in octeon2_usb_clocks_start()
204 	 * clock-reset-control register.  in octeon2_usb_clocks_start()
209 	/* Step 5:    Wait 3 ms for the PHY clock to start. */  in octeon2_usb_clocks_start()
210 	mdelay(3);  in octeon2_usb_clocks_start()
265 	octeon2_usb_clock_start_cnt--;  in octeon2_usb_clocks_stop()
271 	octeon2_usb_clocks_start(&pdev->dev);  in octeon_ehci_power_on()
301 	/* Use 64-bit addressing. */  in octeon_ehci_hw_start()
332 	pd->dev.platform_data = &octeon_ehci_pdata;  in octeon_ehci_device_init()
333 	octeon_ehci_hw_start(&pd->dev);  in octeon_ehci_device_init()
334 	put_device(&pd->dev);  in octeon_ehci_device_init()
342 	octeon2_usb_clocks_start(&pdev->dev);  in octeon_ohci_power_on()
396 	pd->dev.platform_data = &octeon_ohci_pdata;  in octeon_ohci_device_init()
397 	octeon_ohci_hw_start(&pd->dev);  in octeon_ohci_device_init()
398 	put_device(&pd->dev);  in octeon_ohci_device_init()
424 	pd = platform_device_alloc("octeon_rng", -1);  in octeon_rng_device_init()
426 		ret = -ENOMEM;  in octeon_rng_device_init()
449 	{ .compatible = "simple-bus", },
450 	{ .compatible = "cavium,octeon-6335-uctl", },
451 	{ .compatible = "cavium,octeon-5750-usbn", },
452 	{ .compatible = "cavium,octeon-3860-bootbus", },
453 	{ .compatible = "cavium,mdio-mux", },
454 	{ .compatible = "gpio-leds", },
467 	switch (cvmx_sysinfo_get()->board_type) {  in octeon_has_fixed_link()
494 	phy_handle = fdt_getprop(initial_boot_params, eth, "phy-handle", NULL);  in octeon_fdt_set_phy()
501 	alt_phy_handle = fdt_getprop(initial_boot_params, eth, "cavium,alt-phy-handle", NULL);  in octeon_fdt_set_phy()
507 		alt_phy = -1;  in octeon_fdt_set_phy()
512 		fdt_nop_property(initial_boot_params, eth, "phy-handle");  in octeon_fdt_set_phy()
514 		fdt_nop_property(initial_boot_params, eth, "cavium,alt-phy-handle");  in octeon_fdt_set_phy()
528 		phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL);  in octeon_fdt_set_phy()
529 		phy_handle_name = phy_prop->nameoff;  in octeon_fdt_set_phy()
531 		fdt_nop_property(initial_boot_params, eth, "phy-handle");  in octeon_fdt_set_phy()
532 		alt_prop = fdt_get_property_w(initial_boot_params, eth, "cavium,alt-phy-handle", NULL);  in octeon_fdt_set_phy()
533 		alt_prop->nameoff = phy_handle_name;  in octeon_fdt_set_phy()
540 		fdt_nop_property(initial_boot_params, phy, "marvell,reg-init");  in octeon_fdt_set_phy()
556 	snprintf(new_name, sizeof(new_name), "ethernet-phy@%x", phy_addr);  in octeon_fdt_set_phy()
573 	old_mac = fdt_getprop(initial_boot_params, n, "local-mac-address",  in octeon_fdt_set_mac_addr()
581 	new_mac[3] = (mac >> 16) & 0xff;  in octeon_fdt_set_mac_addr()
585 	r = fdt_setprop_inplace(initial_boot_params, n, "local-mac-address",  in octeon_fdt_set_mac_addr()
589 		pr_err("Setting \"local-mac-address\" failed %d", r);  in octeon_fdt_set_mac_addr()
599 	phy_handle = fdt_getprop(initial_boot_params, node, "phy-handle", NULL);  in octeon_fdt_rm_ethernet()
612 	fdt_setprop_inplace_cell(initial_boot_params, eth, "rx-delay",  in _octeon_rx_tx_delay()
614 	fdt_setprop_inplace_cell(initial_boot_params, eth, "tx-delay",  in _octeon_rx_tx_delay()
620 	switch (cvmx_sysinfo_get()->board_type) {  in octeon_rx_tx_delay()
645 	fdt_nop_property(initial_boot_params, eth, "rx-delay");  in octeon_rx_tx_delay()
646 	fdt_nop_property(initial_boot_params, eth, "tx-delay");  in octeon_rx_tx_delay()
674 	fixed_link = fdt_subnode_offset(initial_boot_params, eth, "fixed-link");  in octeon_fdt_pip_port()
698 		octeon_fdt_pip_port(iface, idx, p, count - 1);  in octeon_fdt_pip_iface()
715 		((octeon_bootinfo->mac_addr_base[0] & 0xffull)) << 40 |  in octeon_fill_mac_addresses()
716 		((octeon_bootinfo->mac_addr_base[1] & 0xffull)) << 32 |  in octeon_fill_mac_addresses()
717 		((octeon_bootinfo->mac_addr_base[2] & 0xffull)) << 24 |  in octeon_fill_mac_addresses()
718 		((octeon_bootinfo->mac_addr_base[3] & 0xffull)) << 16 |  in octeon_fill_mac_addresses()
719 		((octeon_bootinfo->mac_addr_base[4] & 0xffull)) << 8 |  in octeon_fill_mac_addresses()
720 		 (octeon_bootinfo->mac_addr_base[5] & 0xffull);  in octeon_fill_mac_addresses()
778 	WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_CUST_DSR1000N,  in octeon_prune_device_tree()
779 	     "Built-in DTB booting is deprecated on %s. Please switch to use appended DTB.",  in octeon_prune_device_tree()
780 	     cvmx_board_type_to_string(octeon_bootinfo->board_type));  in octeon_prune_device_tree()
785 		return -EINVAL;  in octeon_prune_device_tree()
795 	if (octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC10E)  in octeon_prune_device_tree()
892 	uart_mask = 3;  in octeon_prune_device_tree()
898 	for (i = 0; i < 3; i++) {  in octeon_prune_device_tree()
913 						    uart, "clock-frequency",  in octeon_prune_device_tree()
932 		int cs, bootbus;  in octeon_prune_device_tree()  local
942 		if (octeon_bootinfo->major_version == 1  in octeon_prune_device_tree()
943 			&& octeon_bootinfo->minor_version >= 1) {  in octeon_prune_device_tree()
944 			if (octeon_bootinfo->compact_flash_common_base_addr)  in octeon_prune_device_tree()
945 				base_ptr = octeon_bootinfo->compact_flash_common_base_addr;  in octeon_prune_device_tree()
954 		for (cs = 0; cs < 8; cs++) {  in octeon_prune_device_tree()
955 			mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs));  in octeon_prune_device_tree()
964 		if (cs >= 7) {  in octeon_prune_device_tree()
965 			/* cs and cs + 1 are CS0 and CS1, both must be less than 8. */  in octeon_prune_device_tree()
978 				cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs + 1));  in octeon_prune_device_tree()
986 			fdt_nop_property(initial_boot_params, cf, "cavium,true-ide");  in octeon_prune_device_tree()
987 			fdt_nop_property(initial_boot_params, cf, "cavium,dma-engine-handle");  in octeon_prune_device_tree()
992 						"cavium,bus-width", &width, sizeof(width));  in octeon_prune_device_tree()
995 		new_reg[0] = cpu_to_be32(cs);  in octeon_prune_device_tree()
998 		new_reg[3] = cpu_to_be32(cs + 1);  in octeon_prune_device_tree()
1011 		ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32);  in octeon_prune_device_tree()
1012 		ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff);  in octeon_prune_device_tree()
1013 		ranges[(cs * 5) + 4] = cpu_to_be32(region_size);  in octeon_prune_device_tree()
1015 			cs++;  in octeon_prune_device_tree()
1016 			ranges[(cs * 5) + 2] = cpu_to_be32(region1_base >> 32);  in octeon_prune_device_tree()
1017 			ranges[(cs * 5) + 3] = cpu_to_be32(region1_base & 0xffffffff);  in octeon_prune_device_tree()
1018 			ranges[(cs * 5) + 4] = cpu_to_be32(region1_size);  in octeon_prune_device_tree()
1034 		int cs, bootbus;  in octeon_prune_device_tree()  local
1040 		base_ptr = octeon_bootinfo->led_display_base_addr;  in octeon_prune_device_tree()
1044 		for (cs = 0; cs < 8; cs++) {  in octeon_prune_device_tree()
1045 			mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs));  in octeon_prune_device_tree()
1053 		if (cs > 7)  in octeon_prune_device_tree()
1056 		new_reg[0] = cpu_to_be32(cs);  in octeon_prune_device_tree()
1059 		new_reg[3] = cpu_to_be32(cs);  in octeon_prune_device_tree()
1072 		ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32);  in octeon_prune_device_tree()
1073 		ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff);  in octeon_prune_device_tree()
1074 		ranges[(cs * 5) + 4] = cpu_to_be32(region_size);  in octeon_prune_device_tree()
1091 				  octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC2E)) {  in octeon_prune_device_tree()
1095 		} else if (octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC10E ||  in octeon_prune_device_tree()
1096 			   octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC4E) {  in octeon_prune_device_tree()
1097 			/* Missing "refclk-type" defaults to crystal. */  in octeon_prune_device_tree()
1098 			fdt_nop_property(initial_boot_params, uctl, "refclk-type");  in octeon_prune_device_tree()
1122 						    "refclk-frequency",  new_f, sizeof(new_f));  in octeon_prune_device_tree()
1125 				/* Missing "refclk-type" defaults to external. */  in octeon_prune_device_tree()
1126 				fdt_nop_property(initial_boot_params, usbn, "refclk-type");  in octeon_prune_device_tree()