Lines Matching +full:gpio +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <4000000>;
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
63 rootclk: clock-controller@1f801200 {
64 compatible = "microchip,pic32mzda-clk";
66 #clock-cells = <1>;
67 microchip,pic32mzda-sosc;
70 evic: interrupt-controller@1f810000 {
71 compatible = "microchip,pic32mzda-evic";
72 interrupt-controller;
73 #interrupt-cells = <2>;
75 microchip,external-irqs = <3 8 13 18 23>;
78 pic32_pinctrl: pinctrl@1f801400 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "microchip,pic32mzda-pinctrl";
87 gpio0: gpio0@1f860000 {
88 compatible = "microchip,pic32mzda-gpio";
91 #gpio-cells = <2>;
92 gpio-controller;
93 interrupt-controller;
94 #interrupt-cells = <2>;
96 microchip,gpio-bank = <0>;
97 gpio-ranges = <&pic32_pinctrl 0 0 16>;
101 gpio1: gpio1@1f860100 {
102 compatible = "microchip,pic32mzda-gpio";
105 #gpio-cells = <2>;
106 gpio-controller;
107 interrupt-controller;
108 #interrupt-cells = <2>;
110 microchip,gpio-bank = <1>;
111 gpio-ranges = <&pic32_pinctrl 0 16 16>;
115 gpio2: gpio2@1f860200 {
116 compatible = "microchip,pic32mzda-gpio";
119 #gpio-cells = <2>;
120 gpio-controller;
121 interrupt-controller;
122 #interrupt-cells = <2>;
124 microchip,gpio-bank = <2>;
125 gpio-ranges = <&pic32_pinctrl 0 32 16>;
129 gpio3: gpio3@1f860300 {
130 compatible = "microchip,pic32mzda-gpio";
133 #gpio-cells = <2>;
134 gpio-controller;
135 interrupt-controller;
136 #interrupt-cells = <2>;
138 microchip,gpio-bank = <3>;
139 gpio-ranges = <&pic32_pinctrl 0 48 16>;
143 gpio4: gpio4@1f860400 {
144 compatible = "microchip,pic32mzda-gpio";
147 #gpio-cells = <2>;
148 gpio-controller;
149 interrupt-controller;
150 #interrupt-cells = <2>;
152 microchip,gpio-bank = <4>;
153 gpio-ranges = <&pic32_pinctrl 0 64 16>;
157 gpio5: gpio5@1f860500 {
158 compatible = "microchip,pic32mzda-gpio";
161 #gpio-cells = <2>;
162 gpio-controller;
163 interrupt-controller;
164 #interrupt-cells = <2>;
166 microchip,gpio-bank = <5>;
167 gpio-ranges = <&pic32_pinctrl 0 80 16>;
171 gpio6: gpio6@1f860600 {
172 compatible = "microchip,pic32mzda-gpio";
175 #gpio-cells = <2>;
176 gpio-controller;
177 interrupt-controller;
178 #interrupt-cells = <2>;
180 microchip,gpio-bank = <6>;
181 gpio-ranges = <&pic32_pinctrl 0 96 16>;
185 gpio7: gpio7@1f860700 {
186 compatible = "microchip,pic32mzda-gpio";
189 #gpio-cells = <2>;
190 gpio-controller;
191 interrupt-controller;
192 #interrupt-cells = <2>;
194 microchip,gpio-bank = <7>;
195 gpio-ranges = <&pic32_pinctrl 0 112 16>;
201 gpio8: gpio8@1f860800 {
202 compatible = "microchip,pic32mzda-gpio";
205 #gpio-cells = <2>;
206 gpio-controller;
207 interrupt-controller;
208 #interrupt-cells = <2>;
210 microchip,gpio-bank = <8>;
211 gpio-ranges = <&pic32_pinctrl 0 128 16>;
215 gpio9: gpio9@1f860900 {
216 compatible = "microchip,pic32mzda-gpio";
219 #gpio-cells = <2>;
220 gpio-controller;
221 interrupt-controller;
222 #interrupt-cells = <2>;
224 microchip,gpio-bank = <9>;
225 gpio-ranges = <&pic32_pinctrl 0 144 16>;
228 sdhci: mmc@1f8ec000 {
229 compatible = "microchip,pic32mzda-sdhci";
233 clock-names = "base_clk", "sys_clk";
234 bus-width = <4>;
235 cap-sd-highspeed;
239 uart1: serial@1f822000 {
240 compatible = "microchip,pic32mzda-uart";
249 uart2: serial@1f822200 {
250 compatible = "microchip,pic32mzda-uart";
259 uart3: serial@1f822400 {
260 compatible = "microchip,pic32mzda-uart";
269 uart4: serial@1f822600 {
270 compatible = "microchip,pic32mzda-uart";
279 uart5: serial@1f822800 {
280 compatible = "microchip,pic32mzda-uart";
289 uart6: serial@1f822A00 {
290 compatible = "microchip,pic32mzda-uart";