Lines Matching +full:0 +full:x6800
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
15 reg = <0 0x10000000 0 0x400>;
18 loongson,pic-base-vec = <0>;
24 reg = <0 0x100d0100 0 0x78>;
31 reg = <0 0x10080000 0 0x100>;
41 reg = <0 0x10080100 0 0x100>;
51 reg = <0 0x10080200 0 0x100>;
61 reg = <0 0x10080300 0 0x100>;
76 reg = <0 0x1a000000 0 0x02000000>,
77 <0xefe 0x00000000 0 0x20000000>;
79 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
80 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
82 ohci@4,0 {
83 compatible = "pci0014,7a24.0",
88 reg = <0x2000 0x0 0x0 0x0 0x0>;
94 compatible = "pci0014,7a14.0",
99 reg = <0x2100 0x0 0x0 0x0 0x0>;
104 ohci@5,0 {
105 compatible = "pci0014,7a24.0",
110 reg = <0x2800 0x0 0x0 0x0 0x0>;
116 compatible = "pci0014,7a14.0",
121 reg = <0x2900 0x0 0x0 0x0 0x0>;
126 sata@8,0 {
127 compatible = "pci0014,7a08.0",
132 reg = <0x4000 0x0 0x0 0x0 0x0>;
138 compatible = "pci0014,7a08.0",
143 reg = <0x4100 0x0 0x0 0x0 0x0>;
149 compatible = "pci0014,7a08.0",
154 reg = <0x4200 0x0 0x0 0x0 0x0>;
159 gpu@6,0 {
160 compatible = "pci0014,7a15.0",
165 reg = <0x3000 0x0 0x0 0x0 0x0>;
171 compatible = "pci0014,7a06.0",
176 reg = <0x3100 0x0 0x0 0x0 0x0>;
181 hda@7,0 {
182 compatible = "pci0014,7a07.0",
187 reg = <0x3800 0x0 0x0 0x0 0x0>;
192 gmac@3,0 {
193 compatible = "pci0014,7a03.0",
198 reg = <0x1800 0x0 0x0 0x0 0x0>;
206 #size-cells = <0>;
208 phy0: ethernet-phy@0 {
209 reg = <0>;
215 compatible = "pci0014,7a03.0",
221 reg = <0x1900 0x0 0x0 0x0 0x0>;
229 #size-cells = <0>;
232 reg = <0>;
237 pci_bridge@9,0 {
243 reg = <0x4800 0x0 0x0 0x0 0x0>;
248 interrupt-map-mask = <0 0 0 0>;
249 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
252 pci_bridge@a,0 {
258 reg = <0x5000 0x0 0x0 0x0 0x0>;
263 interrupt-map-mask = <0 0 0 0>;
264 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
267 pci_bridge@b,0 {
273 reg = <0x5800 0x0 0x0 0x0 0x0>;
278 interrupt-map-mask = <0 0 0 0>;
279 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
282 pci_bridge@c,0 {
288 reg = <0x6000 0x0 0x0 0x0 0x0>;
293 interrupt-map-mask = <0 0 0 0>;
294 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
297 pci_bridge@d,0 {
303 reg = <0x6800 0x0 0x0 0x0 0x0>;
308 interrupt-map-mask = <0 0 0 0>;
309 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
312 pci_bridge@e,0 {
318 reg = <0x7000 0x0 0x0 0x0 0x0>;
323 interrupt-map-mask = <0 0 0 0>;
324 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
327 pci_bridge@f,0 {
333 reg = <0x7800 0x0 0x0 0x0 0x0>;
338 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
342 pci_bridge@10,0 {
348 reg = <0x8000 0x0 0x0 0x0 0x0>;
353 interrupt-map-mask = <0 0 0 0>;
354 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
357 pci_bridge@11,0 {
363 reg = <0x8800 0x0 0x0 0x0 0x0>;
368 interrupt-map-mask = <0 0 0 0>;
369 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
372 pci_bridge@12,0 {
378 reg = <0x9000 0x0 0x0 0x0 0x0>;
383 interrupt-map-mask = <0 0 0 0>;
384 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
387 pci_bridge@13,0 {
393 reg = <0x9800 0x0 0x0 0x0 0x0>;
398 interrupt-map-mask = <0 0 0 0>;
399 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
402 pci_bridge@14,0 {
408 reg = <0xa000 0x0 0x0 0x0 0x0>;
413 interrupt-map-mask = <0 0 0 0>;
414 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
422 ranges = <1 0 0 0x18000000 0x20000>;