Lines Matching +full:pcie +full:- +full:phy1

1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 #clock-cells = <1>;
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <800000000>;
32 cpuintc: interrupt-controller {
33 #address-cells = <0>;
34 #interrupt-cells = <1>;
35 interrupt-controller;
36 compatible = "mti,cpu-interrupt-controller";
40 compatible = "simple-bus";
41 #address-cells = <2>;
42 #size-cells = <2>;
49 #size-cells = <1>;
50 #address-cells = <2>;
54 pm: reset-controller@1fe07000 {
55 compatible = "loongson,ls2k-pm";
59 liointc0: interrupt-controller@1fe11400 {
60 compatible = "loongson,liointc-2.0";
64 reg-names = "main", "isr0", "isr1";
66 interrupt-controller;
67 #interrupt-cells = <2>;
69 interrupt-parent = <&cpuintc>;
71 interrupt-names = "int0";
79 liointc1: interrupt-controller@1fe11440 {
80 compatible = "loongson,liointc-2.0";
84 reg-names = "main", "isr0", "isr1";
86 interrupt-controller;
87 #interrupt-cells = <2>;
89 interrupt-parent = <&cpuintc>;
91 interrupt-names = "int1";
100 compatible = "loongson,ls2k1000-rtc";
102 interrupt-parent = <&liointc1>;
109 clock-frequency = <125000000>;
110 interrupt-parent = <&liointc0>;
112 no-loopback-test;
116 compatible = "loongson,ls2k-pci";
118 #address-cells = <3>;
119 #size-cells = <2>;
136 interrupt-names = "macirq", "eth_lpi";
137 interrupt-parent = <&liointc0>;
138 phy-mode = "rgmii-id";
139 phy-handle = <&phy1>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "snps,dwmac-mdio";
144 phy0: ethernet-phy@0 {
155 "loongson, pci-gmac";
160 interrupt-names = "macirq", "eth_lpi";
161 interrupt-parent = <&liointc0>;
162 phy-mode = "rgmii-id";
163 phy-handle = <&phy1>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "snps,dwmac-mdio";
168 phy1: ethernet-phy@1 { label
182 interrupt-parent = <&liointc1>;
193 interrupt-parent = <&liointc1>;
204 interrupt-parent = <&liointc0>;
207 pcie@9,0 {
214 #address-cells = <3>;
215 #size-cells = <2>;
217 #interrupt-cells = <1>;
219 interrupt-parent = <&liointc1>;
220 interrupt-map-mask = <0 0 0 0>;
221 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_HIGH>;
223 external-facing;
226 pcie@a,0 {
233 #address-cells = <3>;
234 #size-cells = <2>;
236 #interrupt-cells = <1>;
238 interrupt-parent = <&liointc1>;
239 interrupt-map-mask = <0 0 0 0>;
240 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>;
242 external-facing;
245 pcie@b,0 {
252 #address-cells = <3>;
253 #size-cells = <2>;
255 #interrupt-cells = <1>;
257 interrupt-parent = <&liointc1>;
258 interrupt-map-mask = <0 0 0 0>;
259 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>;
261 external-facing;
264 pcie@c,0 {
271 #address-cells = <3>;
272 #size-cells = <2>;
274 #interrupt-cells = <1>;
276 interrupt-parent = <&liointc1>;
277 interrupt-map-mask = <0 0 0 0>;
278 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>;
280 external-facing;
283 pcie@d,0 {
290 #address-cells = <3>;
291 #size-cells = <2>;
293 #interrupt-cells = <1>;
295 interrupt-parent = <&liointc1>;
296 interrupt-map-mask = <0 0 0 0>;
297 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>;
299 external-facing;
302 pcie@e,0 {
309 #address-cells = <3>;
310 #size-cells = <2>;
312 #interrupt-cells = <1>;
314 interrupt-parent = <&liointc1>;
315 interrupt-map-mask = <0 0 0 0>;
316 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>;
318 external-facing;