Lines Matching +full:0 +full:x13450000

13 		#size-cells = <0>;
15 		cpu0: cpu@0 {
17 			compatible = "ingenic,xburst-fpu2.0-mxu2.0";
18 			reg = <0>;
26 		#address-cells = <0>;
34 		reg = <0x10001000 0x50>;
45 		#clock-cells = <0>;
50 		#clock-cells = <0>;
56 		reg = <0x10000000 0x100>;
59 		ranges = <0x0 0x10000000 0x100>;
68 			reg = <0x3c 0x10>;
72 			#phy-cells = <0>;
79 			reg = <0xe8 0x4>;
85 		reg = <0x12000000 0x3c>;
98 		reg = <0x10002000 0x1000>;
101 		ranges = <0x0 0x10002000 0x1000>;
117 		wdt: watchdog@0 {
119 			reg = <0x0 0x10>;
127 			reg = <0x40 0x80>;
142 		reg = <0x10003000 0x4c>;
153 		reg = <0x10010000 0x800>;
155 		#size-cells = <0>;
157 		gpa: gpio@0 {
159 			reg = <0>;
162 			gpio-ranges = <&pinctrl 0 0 32>;
177 			gpio-ranges = <&pinctrl 0 32 32>;
192 			gpio-ranges = <&pinctrl 0 64 32>;
207 			gpio-ranges = <&pinctrl 0 96 32>;
220 		reg = <0x10030000 0x100>;
233 		reg = <0x10031000 0x100>;
246 		reg = <0x10043000 0x20>;
248 		#size-cells = <0>;
256 		dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
257 			   <&pdma X1830_DMA_SSI0_TX 0xffffffff>;
265 		reg = <0x10044000 0x20>;
267 		#size-cells = <0>;
275 		dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
276 			   <&pdma X1830_DMA_SSI1_TX 0xffffffff>;
284 		reg = <0x10050000 0x1000>;
286 		#size-cells = <0>;
298 		reg = <0x10051000 0x1000>;
300 		#size-cells = <0>;
312 		reg = <0x10052000 0x1000>;
314 		#size-cells = <0>;
326 		reg = <0x10072000 0xc>;
335 		reg = <0x13420000 0x400>, <0x13421000 0x40>;
347 		reg = <0x13450000 0x1000>;
359 		dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
360 			   <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
368 		reg = <0x13460000 0x1000>;
380 		dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
381 			   <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
389 		reg = <0x134b0000 0x2000>;
405 			#size-cells = <0>;
413 		reg = <0x13500000 0x40000>;