Lines Matching +full:0 +full:x13450000
13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 #address-cells = <0>;
43 reg = <0x10001000 0x50>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10000000 0x100>;
68 ranges = <0x0 0x10000000 0x100>;
77 reg = <0x3c 0x10>;
81 #phy-cells = <0>;
88 reg = <0xd8 0x8>;
98 reg = <0x10002000 0x1000>;
101 ranges = <0x0 0x10002000 0x1000>;
116 watchdog: watchdog@0 {
118 reg = <0x0 0xc>;
126 reg = <0x40 0x80>;
140 reg = <0xe0 0x20>;
151 reg = <0x10003000 0x4c>;
159 #clock-cells = <0>;
164 reg = <0x10010000 0x600>;
167 #size-cells = <0>;
169 gpa: gpio@0 {
171 reg = <0>;
174 gpio-ranges = <&pinctrl 0 0 32>;
189 gpio-ranges = <&pinctrl 0 32 32>;
204 gpio-ranges = <&pinctrl 0 64 32>;
219 gpio-ranges = <&pinctrl 0 96 32>;
234 gpio-ranges = <&pinctrl 0 128 32>;
249 gpio-ranges = <&pinctrl 0 160 32>;
262 reg = <0x10043000 0x1c>;
264 #size-cells = <0>;
272 dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
273 <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
281 reg = <0x10030000 0x100>;
294 reg = <0x10031000 0x100>;
307 reg = <0x10032000 0x100>;
320 reg = <0x10033000 0x100>;
333 reg = <0x10034000 0x100>;
346 reg = <0x10044000 0x1c>;
348 #size-sells = <0>;
356 dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
357 <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
366 #size-cells = <0>;
368 reg = <0x10050000 0x1000>;
376 pinctrl-0 = <&pins_i2c0_data>;
384 #size-cells = <0>;
385 reg = <0x10051000 0x1000>;
393 pinctrl-0 = <&pins_i2c1_data>;
401 #size-cells = <0>;
402 reg = <0x10052000 0x1000>;
410 pinctrl-0 = <&pins_i2c2_data>;
418 #size-cells = <0>;
419 reg = <0x10053000 0x1000>;
427 pinctrl-0 = <&pins_i2c3_data>;
435 #size-cells = <0>;
436 reg = <0x10054000 0x1000>;
444 pinctrl-0 = <&pins_i2c4_data>;
451 reg = <0x10180000 0x8000>;
465 reg = <0x13050000 0x1800>;
478 reg = <0x130a0000 0x1800>;
491 reg = <0x13410000 0x10000>;
494 ranges = <0 0 0x13410000 0x10000>,
495 <1 0 0x1b000000 0x1000000>,
496 <2 0 0x1a000000 0x1000000>,
497 <3 0 0x19000000 0x1000000>,
498 <4 0 0x18000000 0x1000000>,
499 <5 0 0x17000000 0x1000000>,
500 <6 0 0x16000000 0x1000000>;
507 reg = <0 0xd0 0x30>;
516 reg = <0x22 0x6>;
523 reg = <0x13420000 0x400>, <0x13421000 0x40>;
534 reg = <0x13450000 0x1000>;
545 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
546 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
554 reg = <0x13460000 0x1000>;
565 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
566 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
574 reg = <0x134d0000 0x10000>;
583 reg = <0x13500000 0x40000>;