Lines Matching +full:0 +full:- +full:mxu1
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
28 compatible = "mti,cpu-interrupt-controller";
31 intc: interrupt-controller@10001000 {
32 compatible = "ingenic,jz4740-intc";
33 reg = <0x10001000 0x14>;
35 interrupt-controller;
36 #interrupt-cells = <1>;
38 interrupt-parent = <&cpuintc>;
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <32768>;
53 cgu: jz4740-cgu@10000000 {
54 compatible = "ingenic,jz4740-cgu";
55 reg = <0x10000000 0x100>;
58 clock-names = "ext", "rtc";
60 #clock-cells = <1>;
64 compatible = "ingenic,jz4740-tcu", "simple-mfd";
65 reg = <0x10002000 0x1000>;
66 #address-cells = <1>;
67 #size-cells = <1>;
68 ranges = <0x0 0x10002000 0x1000>;
70 #clock-cells = <1>;
76 clock-names = "rtc", "ext", "pclk", "tcu";
78 interrupt-controller;
79 #interrupt-cells = <1>;
81 interrupt-parent = <&intc>;
84 watchdog: watchdog@0 {
85 compatible = "ingenic,jz4740-watchdog";
86 reg = <0x0 0xc>;
89 clock-names = "wdt";
93 compatible = "ingenic,jz4740-pwm";
94 reg = <0x40 0x80>;
96 #pwm-cells = <3>;
102 clock-names = "timer0", "timer1", "timer2", "timer3",
108 compatible = "ingenic,jz4740-rtc";
109 reg = <0x10003000 0x40>;
111 interrupt-parent = <&intc>;
115 clock-names = "rtc";
118 pinctrl: pin-controller@10010000 {
119 compatible = "ingenic,jz4740-pinctrl";
120 reg = <0x10010000 0x400>;
122 #address-cells = <1>;
123 #size-cells = <0>;
125 gpa: gpio@0 {
126 compatible = "ingenic,jz4740-gpio";
127 reg = <0>;
129 gpio-controller;
130 gpio-ranges = <&pinctrl 0 0 32>;
131 #gpio-cells = <2>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
136 interrupt-parent = <&intc>;
141 compatible = "ingenic,jz4740-gpio";
144 gpio-controller;
145 gpio-ranges = <&pinctrl 0 32 32>;
146 #gpio-cells = <2>;
148 interrupt-controller;
149 #interrupt-cells = <2>;
151 interrupt-parent = <&intc>;
156 compatible = "ingenic,jz4740-gpio";
159 gpio-controller;
160 gpio-ranges = <&pinctrl 0 64 32>;
161 #gpio-cells = <2>;
163 interrupt-controller;
164 #interrupt-cells = <2>;
166 interrupt-parent = <&intc>;
171 compatible = "ingenic,jz4740-gpio";
174 gpio-controller;
175 gpio-ranges = <&pinctrl 0 96 32>;
176 #gpio-cells = <2>;
178 interrupt-controller;
179 #interrupt-cells = <2>;
181 interrupt-parent = <&intc>;
186 aic: audio-controller@10020000 {
187 compatible = "ingenic,jz4740-i2s";
188 reg = <0x10020000 0x38>;
190 #sound-dai-cells = <0>;
192 interrupt-parent = <&intc>;
196 clock-names = "aic", "i2s";
198 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
199 dma-names = "rx", "tx";
202 codec: audio-codec@100200a4 {
203 compatible = "ingenic,jz4740-codec";
204 reg = <0x10020080 0x8>;
206 #sound-dai-cells = <0>;
209 clock-names = "aic";
213 compatible = "ingenic,jz4740-mmc";
214 reg = <0x10021000 0x1000>;
217 clock-names = "mmc";
219 interrupt-parent = <&intc>;
222 dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
223 dma-names = "rx", "tx";
225 cap-sd-highspeed;
226 cap-mmc-highspeed;
227 cap-sdio-irq;
231 compatible = "ingenic,jz4740-uart";
232 reg = <0x10030000 0x100>;
234 interrupt-parent = <&intc>;
238 clock-names = "baud", "module";
242 compatible = "ingenic,jz4740-uart";
243 reg = <0x10031000 0x100>;
245 interrupt-parent = <&intc>;
249 clock-names = "baud", "module";
253 compatible = "ingenic,jz4740-adc";
254 reg = <0x10070000 0x30>;
255 #io-channel-cells = <1>;
258 clock-names = "adc";
260 interrupt-parent = <&intc>;
264 nemc: memory-controller@13010000 {
265 compatible = "ingenic,jz4740-nemc";
266 reg = <0x13010000 0x54>;
267 #address-cells = <2>;
268 #size-cells = <1>;
269 ranges = <1 0 0x18000000 0x4000000>,
270 <2 0 0x14000000 0x4000000>,
271 <3 0 0x0c000000 0x4000000>,
272 <4 0 0x08000000 0x4000000>;
277 ecc: ecc-controller@13010100 {
278 compatible = "ingenic,jz4740-ecc";
279 reg = <0x13010100 0x2C>;
284 dmac: dma-controller@13020000 {
285 compatible = "ingenic,jz4740-dma";
286 reg = <0x13020000 0xbc>, <0x13020300 0x14>;
287 #dma-cells = <2>;
289 interrupt-parent = <&intc>;
296 compatible = "ingenic,jz4740-ohci", "generic-ohci";
297 reg = <0x13030000 0x1000>;
300 assigned-clocks = <&cgu JZ4740_CLK_UHC>;
301 assigned-clock-rates = <48000000>;
303 interrupt-parent = <&intc>;
310 compatible = "ingenic,jz4740-musb";
311 reg = <0x13040000 0x10000>;
313 interrupt-parent = <&intc>;
315 interrupt-names = "mc";
318 clock-names = "udc";
321 lcd: lcd-controller@13050000 {
322 compatible = "ingenic,jz4740-lcd";
323 reg = <0x13050000 0x60>; /* LCDCMD1+4 */
325 interrupt-parent = <&intc>;
329 clock-names = "lcd_pclk", "lcd";