Lines Matching +full:0 +full:- +full:mxu1
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
28 compatible = "mti,cpu-interrupt-controller";
31 intc: interrupt-controller@10001000 {
32 compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc";
33 reg = <0x10001000 0x14>;
35 interrupt-controller;
36 #interrupt-cells = <1>;
38 interrupt-parent = <&cpuintc>;
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <32768>;
53 cgu: clock-controller@10000000 {
54 compatible = "ingenic,jz4725b-cgu";
55 reg = <0x10000000 0x100>;
58 clock-names = "ext", "osc32k";
60 #clock-cells = <1>;
64 compatible = "ingenic,jz4725b-tcu", "simple-mfd";
65 reg = <0x10002000 0x1000>;
66 #address-cells = <1>;
67 #size-cells = <1>;
68 ranges = <0x0 0x10002000 0x1000>;
70 #clock-cells = <1>;
76 clock-names = "rtc", "ext", "pclk", "tcu";
78 interrupt-controller;
79 #interrupt-cells = <1>;
81 interrupt-parent = <&intc>;
84 watchdog: watchdog@0 {
85 compatible = "ingenic,jz4725b-watchdog", "ingenic,jz4740-watchdog";
86 reg = <0x0 0xc>;
89 clock-names = "wdt";
93 compatible = "ingenic,jz4725b-pwm";
94 reg = <0x60 0x40>;
96 #pwm-cells = <3>;
101 clock-names = "timer0", "timer1", "timer2",
106 compatible = "ingenic,jz4725b-ost";
107 reg = <0xe0 0x20>;
110 clock-names = "ost";
117 compatible = "ingenic,jz4725b-rtc", "ingenic,jz4740-rtc";
118 reg = <0x10003000 0x40>;
120 interrupt-parent = <&intc>;
124 clock-names = "rtc";
128 compatible = "ingenic,jz4725b-pinctrl";
129 reg = <0x10010000 0x400>;
131 #address-cells = <1>;
132 #size-cells = <0>;
134 gpa: gpio@0 {
135 compatible = "ingenic,jz4725b-gpio";
136 reg = <0>;
138 gpio-controller;
139 gpio-ranges = <&pinctrl 0 0 32>;
140 #gpio-cells = <2>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
145 interrupt-parent = <&intc>;
150 compatible = "ingenic,jz4725b-gpio";
153 gpio-controller;
154 gpio-ranges = <&pinctrl 0 32 32>;
155 #gpio-cells = <2>;
157 interrupt-controller;
158 #interrupt-cells = <2>;
160 interrupt-parent = <&intc>;
165 compatible = "ingenic,jz4725b-gpio";
168 gpio-controller;
169 gpio-ranges = <&pinctrl 0 64 32>;
170 #gpio-cells = <2>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
175 interrupt-parent = <&intc>;
180 compatible = "ingenic,jz4725b-gpio";
183 gpio-controller;
184 gpio-ranges = <&pinctrl 0 96 32>;
185 #gpio-cells = <2>;
187 interrupt-controller;
188 #interrupt-cells = <2>;
190 interrupt-parent = <&intc>;
195 aic: audio-controller@10020000 {
196 compatible = "ingenic,jz4725b-i2s", "ingenic,jz4740-i2s";
197 reg = <0x10020000 0x38>;
199 #sound-dai-cells = <0>;
202 clock-names = "aic", "i2s";
204 interrupt-parent = <&intc>;
207 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
208 dma-names = "rx", "tx";
211 codec: audio-codec@100200a4 {
212 compatible = "ingenic,jz4725b-codec";
213 reg = <0x100200a4 0x8>;
215 #sound-dai-cells = <0>;
218 clock-names = "aic";
222 compatible = "ingenic,jz4725b-mmc";
223 reg = <0x10021000 0x1000>;
226 clock-names = "mmc";
228 interrupt-parent = <&intc>;
231 dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
232 dma-names = "rx", "tx";
234 cap-sd-highspeed;
235 cap-mmc-highspeed;
236 cap-sdio-irq;
240 compatible = "ingenic,jz4725b-mmc";
241 reg = <0x10022000 0x1000>;
244 clock-names = "mmc";
246 interrupt-parent = <&intc>;
249 dmas = <&dmac 31 0xffffffff>, <&dmac 30 0xffffffff>;
250 dma-names = "rx", "tx";
252 cap-sd-highspeed;
253 cap-mmc-highspeed;
254 cap-sdio-irq;
258 compatible = "ingenic,jz4725b-uart", "ingenic,jz4740-uart";
259 reg = <0x10030000 0x100>;
261 interrupt-parent = <&intc>;
265 clock-names = "baud", "module";
269 compatible = "ingenic,jz4725b-adc";
270 #io-channel-cells = <1>;
272 reg = <0x10070000 0x30>;
273 #address-cells = <1>;
274 #size-cells = <1>;
275 ranges = <0x0 0x10070000 0x30>;
278 clock-names = "adc";
280 interrupt-parent = <&intc>;
284 nemc: memory-controller@13010000 {
285 compatible = "ingenic,jz4725b-nemc", "ingenic,jz4740-nemc";
286 reg = <0x13010000 0x10000>;
287 #address-cells = <2>;
288 #size-cells = <1>;
289 ranges = <1 0 0x18000000 0x4000000>, <2 0 0x14000000 0x4000000>,
290 <3 0 0x0c000000 0x4000000>, <4 0 0x08000000 0x4000000>;
295 dmac: dma-controller@13020000 {
296 compatible = "ingenic,jz4725b-dma";
297 reg = <0x13020000 0xd8>, <0x13020300 0x14>;
299 #dma-cells = <2>;
301 interrupt-parent = <&intc>;
308 compatible = "ingenic,jz4725b-musb", "ingenic,jz4740-musb";
309 reg = <0x13040000 0x10000>;
311 interrupt-parent = <&intc>;
313 interrupt-names = "mc";
316 clock-names = "udc";
319 lcd: lcd-controller@13050000 {
320 compatible = "ingenic,jz4725b-lcd";
321 reg = <0x13050000 0x130>; /* tbc */
323 interrupt-parent = <&intc>;
327 clock-names = "lcd_pclk";
330 #address-cells = <1>;
331 #size-cells = <0>;
337 remote-endpoint = <&ipu_input>;
344 compatible = "ingenic,jz4725b-ipu";
345 reg = <0x13080000 0x64>;
347 interrupt-parent = <&intc>;
351 clock-names = "ipu";
355 remote-endpoint = <&ipu_output>;
360 bch: ecc-controller@130d0000 {
361 compatible = "ingenic,jz4725b-bch";
362 reg = <0x130d0000 0x44>;
368 compatible = "mtd-rom";
369 reg = <0x1fc00000 0x2000>;
371 bank-width = <4>;
372 device-width = <1>;