Lines Matching +full:drive +full:- +full:strength
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <0>;
30 clock-names = "cpu";
31 clock-latency = <1000>;
32 operating-points = <
45 compatible = "img,scb-i2c";
50 clock-names = "scb", "sys";
51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
55 pinctrl-names = "default";
56 pinctrl-0 = <&i2c0_pins>;
58 #address-cells = <1>;
59 #size-cells = <0>;
63 compatible = "img,scb-i2c";
68 clock-names = "scb", "sys";
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c1_pins>;
76 #address-cells = <1>;
77 #size-cells = <0>;
81 compatible = "img,scb-i2c";
86 clock-names = "scb", "sys";
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&i2c2_pins>;
94 #address-cells = <1>;
95 #size-cells = <0>;
99 compatible = "img,scb-i2c";
104 clock-names = "scb", "sys";
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&i2c3_pins>;
112 #address-cells = <1>;
113 #size-cells = <0>;
116 i2s_in: i2s-in@18100800 {
117 compatible = "img,i2s-in";
121 dma-names = "rx";
123 clock-names = "sys";
124 img,i2s-channels = <6>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&i2s_in_pins>;
129 #sound-dai-cells = <0>;
132 i2s_out: i2s-out@18100a00 {
133 compatible = "img,i2s-out";
137 dma-names = "tx";
140 clock-names = "sys", "ref";
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
143 img,i2s-channels = <6>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&i2s_out_pins>;
148 reset-names = "rst";
149 #sound-dai-cells = <0>;
152 parallel_out: parallel-audio-out@18100c00 {
153 compatible = "img,parallel-out";
157 dma-names = "tx";
160 clock-names = "sys", "ref";
161 assigned-clocks = <&clk_core CLK_AUDIO_DAC_DIV>;
162 assigned-clock-rates = <12288000>;
165 reset-names = "rst";
166 #sound-dai-cells = <0>;
169 spdif_out: spdif-out@18100d00 {
170 compatible = "img,spdif-out";
174 dma-names = "tx";
177 clock-names = "sys", "ref";
178 assigned-clocks = <&clk_core CLK_SPDIF_DIV>;
179 assigned-clock-rates = <12288000>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&spdif_out_pin>;
184 reset-names = "rst";
185 #sound-dai-cells = <0>;
188 spdif_in: spdif-in@18100e00 {
189 compatible = "img,spdif-in";
193 dma-names = "rx";
195 clock-names = "sys";
196 pinctrl-names = "default";
197 pinctrl-0 = <&spdif_in_pin>;
200 #sound-dai-cells = <0>;
203 internal_dac: internal-dac {
204 compatible = "img,pistachio-internal-dac";
205 img,cr-top = <&cr_top>;
206 img,voltage-select = <1>;
208 #sound-dai-cells = <0>;
216 clock-names = "sys", "spfi";
218 dma-names = "rx", "tx";
219 spfi-max-frequency = <50000000>;
222 #address-cells = <1>;
223 #size-cells = <0>;
231 clock-names = "sys", "spfi";
233 dma-names = "rx", "tx";
234 img,supports-quad-mode;
235 spfi-max-frequency = <50000000>;
238 #address-cells = <1>;
239 #size-cells = <0>;
243 compatible = "img,pistachio-pwm";
247 clock-names = "pwm", "sys";
248 img,cr-periph = <&cr_periph>;
249 #pwm-cells = <2>;
254 compatible = "snps,dw-apb-uart";
258 clock-names = "baudclk", "apb_pclk";
259 assigned-clocks = <&clk_core CLK_UART0_INTERNAL_DIV>,
261 reg-shift = <2>;
262 reg-io-width = <4>;
263 pinctrl-0 = <&uart0_pins>, <&uart0_rts_cts_pins>;
264 pinctrl-names = "default";
269 compatible = "snps,dw-apb-uart";
273 clock-names = "baudclk", "apb_pclk";
274 assigned-clocks = <&clk_core CLK_UART1_INTERNAL_DIV>,
276 assigned-clock-rates = <114278400>, <1843200>;
277 reg-shift = <2>;
278 reg-io-width = <4>;
279 pinctrl-0 = <&uart1_pins>;
280 pinctrl-names = "default";
285 compatible = "cosmic,10001-adc";
287 adc-reserved-channels = <0x30>;
289 clock-names = "adc";
290 assigned-clocks = <&clk_core CLK_AUX_ADC_INTERNAL_DIV>,
292 assigned-clock-rates = <100000000>, <1000000>;
295 #io-channel-cells = <1>;
299 compatible = "img,pistachio-system-pinctrl";
305 gpio-controller;
306 #gpio-cells = <2>;
307 gpio-ranges = <&pinctrl 0 0 16>;
309 interrupt-controller;
310 #interrupt-cells = <2>;
316 gpio-controller;
317 #gpio-cells = <2>;
318 gpio-ranges = <&pinctrl 0 16 16>;
320 interrupt-controller;
321 #interrupt-cells = <2>;
327 gpio-controller;
328 #gpio-cells = <2>;
329 gpio-ranges = <&pinctrl 0 32 16>;
331 interrupt-controller;
332 #interrupt-cells = <2>;
338 gpio-controller;
339 #gpio-cells = <2>;
340 gpio-ranges = <&pinctrl 0 48 16>;
342 interrupt-controller;
343 #interrupt-cells = <2>;
349 gpio-controller;
350 #gpio-cells = <2>;
351 gpio-ranges = <&pinctrl 0 64 16>;
353 interrupt-controller;
354 #interrupt-cells = <2>;
360 gpio-controller;
361 #gpio-cells = <2>;
362 gpio-ranges = <&pinctrl 0 80 10>;
364 interrupt-controller;
365 #interrupt-cells = <2>;
368 i2c0_pins: i2c0-pins {
372 drive-strength = <4>;
376 i2c1_pins: i2c1-pins {
380 drive-strength = <4>;
384 i2c2_pins: i2c2-pins {
388 drive-strength = <4>;
392 i2c3_pins: i2c3-pins {
396 drive-strength = <4>;
400 spim0_pins: spim0-pins {
404 drive-strength = <4>;
406 spim0_clk: spim0-clk {
409 drive-strength = <4>;
413 spim0_cs0_alt_pin: spim0-cs0-alt-pin {
414 spim0-cs0 {
416 drive-strength = <2>;
420 spim0_cs1_pin: spim0-cs1-pin {
421 spim0-cs1 {
423 drive-strength = <2>;
427 spim0_cs2_pin: spim0-cs2-pin {
428 spim0-cs2 {
430 drive-strength = <2>;
434 spim0_cs2_alt_pin: spim0-cs2-alt-pin {
435 spim0-cs2 {
437 drive-strength = <2>;
441 spim0_cs3_pin: spim0-cs3-pin {
442 spim0-cs3 {
444 drive-strength = <2>;
448 spim0_cs3_alt_pin: spim0-cs3-alt-pin {
449 spim0-cs3 {
451 drive-strength = <2>;
455 spim0_cs4_pin: spim0-cs4-pin {
456 spim0-cs4 {
458 drive-strength = <2>;
462 spim0_cs4_alt_pin: spim0-cs4-alt-pin {
463 spim0-cs4 {
465 drive-strength = <2>;
469 spim1_pins: spim1-pins {
473 drive-strength = <2>;
477 spim1_quad_pins: spim1-quad-pins {
478 spim1-quad {
481 drive-strength = <2>;
485 spim1_cs0_pin: spim1-cs0-pins {
486 spim1-cs0 {
489 drive-strength = <2>;
493 spim1_cs1_pin: spim1-cs1-pin {
494 spim1-cs1 {
497 drive-strength = <2>;
501 spim1_cs1_alt_pin: spim1-cs1-alt-pin {
502 spim1-cs1 {
505 drive-strength = <2>;
509 spim1_cs2_pin: spim1-cs2-pin {
510 spim1-cs2 {
513 drive-strength = <2>;
517 spim1_cs2_alt0_pin: spim1-cs2-alt0-pin {
518 spim1-cs2 {
521 drive-strength = <2>;
525 spim1_cs2_alt1_pin: spim1-cs2-alt1-pin {
526 spim1-cs2 {
529 drive-strength = <2>;
533 spim1_cs3_pin: spim1-cs3-pin {
534 spim1-cs3 {
537 drive-strength = <2>;
541 spim1_cs4_pin: spim1-cs4-pin {
542 spim1-cs4 {
545 drive-strength = <2>;
549 uart0_pins: uart0-pins {
553 drive-strength = <2>;
557 uart0_rts_cts_pins: uart0-rts-cts-pins {
558 uart0-rts-cts {
561 drive-strength = <2>;
565 uart1_pins: uart1-pins {
569 drive-strength = <2>;
573 uart1_rts_cts_pins: uart1-rts-cts-pins {
574 uart1-rts-cts {
577 drive-strength = <2>;
581 enet_pins: enet-pins {
586 slew-rate = <1>;
587 drive-strength = <4>;
589 pin_enet_phy_clk: enet-phy-clk {
592 slew-rate = <1>;
593 drive-strength = <8>;
597 sdhost_pins: sdhost-pins {
598 pin_sdhost_clk: sdhost-clk {
601 slew-rate = <1>;
602 drive-strength = <4>;
604 pin_sdhost_cmd: sdhost-cmd {
607 slew-rate = <1>;
608 drive-strength = <4>;
610 pin_sdhost_data: sdhost-data {
614 slew-rate = <1>;
615 drive-strength = <4>;
617 pin_sdhost_power_select: sdhost-power-select {
620 slew-rate = <1>;
621 drive-strength = <2>;
623 pin_sdhost_card_detect: sdhost-card-detect {
626 drive-strength = <2>;
628 pin_sdhost_write_protect: sdhost-write-protect {
631 drive-strength = <2>;
635 ir_pin: ir-pin {
636 ir-data {
639 drive-strength = <2>;
643 pwmpdm0_pin: pwmpdm0-pin {
647 drive-strength = <2>;
651 pwmpdm1_pin: pwmpdm1-pin {
655 drive-strength = <2>;
659 pwmpdm2_pin: pwmpdm2-pin {
663 drive-strength = <2>;
667 pwmpdm3_pin: pwmpdm3-pin {
671 drive-strength = <2>;
675 dac_clk_pin: dac-clk-pin {
676 pin_dac_clk: dac-clk {
679 drive-strength = <4>;
683 i2s_mclk_pin: i2s-mclk-pin {
684 pin_i2s_mclk: i2s-mclk {
687 drive-strength = <4>;
691 spdif_out_pin: spdif-out-pin {
692 spdif-out {
695 slew-rate = <1>;
696 drive-strength = <2>;
700 spdif_in_pin: spdif-in-pin {
701 spdif-in {
704 drive-strength = <2>;
708 i2s_out_pins: i2s-out-pins {
709 pins_i2s_out_clk: i2s-out-clk {
712 drive-strength = <4>;
714 pins_i2s_out: i2s-out {
719 drive-strength = <2>;
723 i2s_in_pins: i2s-in-pins {
724 i2s-in {
729 drive-strength = <2>;
735 compatible = "img,pistachio-gptimer";
740 clock-names = "fast", "sys";
741 img,cr-periph = <&cr_periph>;
745 compatible = "img,pdc-wdt";
749 clock-names = "wdt", "sys";
750 assigned-clocks = <&clk_periph PERIPH_CLK_WD_PRE_DIV>,
752 assigned-clock-rates = <4000000>, <32768>;
756 compatible = "img,ir-rev1";
760 clock-names = "core", "sys";
761 assigned-clocks = <&clk_periph PERIPH_CLK_IR_PRE_DIV>,
763 assigned-clock-rates = <4000000>, <32768>;
764 pinctrl-0 = <&ir_pin>;
765 pinctrl-names = "default";
774 phy-names = "usb2-phy";
775 g-tx-fifo-size = <256 256 256 256>;
783 interrupt-names = "macirq";
785 clock-names = "stmmaceth", "pclk";
786 assigned-clocks = <&clk_core CLK_ENET_MUX>,
788 assigned-clock-parents = <&clk_core CLK_SYS_INTERNAL_DIV>;
789 assigned-clock-rates = <0>, <50000000>;
790 pinctrl-0 = <&enet_pins>;
791 pinctrl-names = "default";
792 phy-mode = "rmii";
797 compatible = "img,pistachio-dw-mshc";
801 clock-names = "ciu", "biu";
802 pinctrl-0 = <&sdhost_pins>;
803 pinctrl-names = "default";
804 fifo-depth = <0x20>;
805 clock-frequency = <50000000>;
806 bus-width = <8>;
807 cap-mmc-highspeed;
808 cap-sd-highspeed;
813 compatible = "mmio-sram";
817 mdc: dma-controller@18143000 {
818 compatible = "img,pistachio-mdc-dma";
833 clock-names = "sys";
835 img,max-burst-multiplier = <16>;
836 img,cr-periph = <&cr_periph>;
838 #dma-cells = <3>;
842 compatible = "img,pistachio-clk", "syscon";
845 clock-names = "xtal", "audio_refclk_ext_gate",
848 #clock-cells = <1>;
852 compatible = "img,pistachio-clk-periph";
855 clock-names = "periph_sys_core";
856 #clock-cells = <1>;
860 compatible = "img,pistachio-cr-periph", "syscon", "simple-bus";
863 clock-names = "sys";
864 #clock-cells = <1>;
866 pistachio_reset: reset-controller {
867 compatible = "img,pistachio-reset";
868 #reset-cells = <1>;
873 compatible = "img,pistachio-cr-top", "syscon";
875 #clock-cells = <1>;
879 compatible = "img,hash-accelerator";
883 dma-names = "tx";
886 clock-names = "sys", "hash";
889 gic: interrupt-controller@1bdc0000 {
893 interrupt-controller;
894 #interrupt-cells = <3>;
897 compatible = "mti,gic-timer";
904 compatible = "mti,mips-cpc";
909 compatible = "mti,mips-cdmm";
913 usb_phy: usb-phy {
914 compatible = "img,pistachio-usb-phy";
916 clock-names = "usb_phy";
917 assigned-clocks = <&clk_core CLK_USB_PHY_DIV>;
918 assigned-clock-rates = <50000000>;
920 img,cr-top = <&cr_top>;
921 #phy-cells = <0>;
925 compatible = "fixed-clock";
926 #clock-cells = <0>;
927 clock-frequency = <52000000>;
928 clock-output-names = "xtal";