Lines Matching +full:default +full:- +full:on
1 # SPDX-License-Identifier: GPL-2.0
4 default y
141 default MIPS_GENERIC_KERNEL
144 bool "Generic board-agnostic MIPS kernel"
286 Build a generic DT-based kernel image that boots on select
287 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
379 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
380 DECstation porting pages on <http://decstation.unix-ag.org/>.
441 This a family of machines based on the MIPS R4030 chipset which was
444 Olivetti M700-10 workstations.
481 bool "Loongson 32-bit family of machines"
501 This enables support for the Loongson-1 family of machines.
503 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
508 bool "Loongson-2E/F family of machines"
511 This enables the support of early Loongson-2E/F family of machines.
514 bool "Loongson 64-bit family of machines"
549 This enables the support of Loongson-2/3 family of machines.
551 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
552 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
553 and Loongson-2F which will be removed), developed by the Institute
619 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
755 that runs on these, say Y here.
784 workstations. To compile a Linux kernel that runs on these, say Y
819 kernel that runs on these, say Y here.
847 compile a Linux kernel that runs on these, say Y here.
872 If you want this kernel to run on SGI O2 workstation, say Y here.
875 bool "Sibyte BCM91125C-CRhone"
885 bool "Sibyte BCM91125E-Rhone"
894 bool "Sibyte BCM91250A-SWARM"
907 bool "Sibyte BCM91250C2-LittleSur"
919 bool "Sibyte BCM91250E-Sentosa"
929 bool "Sibyte BCM91480B-BigSur"
978 The SNI RM200/300/400 are MIPS-based machines manufactured by
1003 based on the IDT RC32434 SoC.
1052 depends on MACH_EYEQ5
1053 default n
1057 This requires u-boot on the platform.
1073 source "arch/mips/sgi-ip27/Kconfig"
1076 source "arch/mips/cavium-octeon/Kconfig"
1085 default y
1089 default y
1093 default y
1096 # Select some configuration options automatically based on user selections.
1234 depends on SYS_SUPPORTS_BIG_ENDIAN
1238 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1322 default "7" if MIPS_L1_CACHE_SHIFT_7
1323 default "6" if MIPS_L1_CACHE_SHIFT_6
1324 default "5" if MIPS_L1_CACHE_SHIFT_5
1325 default "4" if MIPS_L1_CACHE_SHIFT_4
1326 default "5"
1333 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1351 default CPU_R4X00
1354 bool "Loongson 64-bit CPU"
1355 depends on SYS_HAS_CPU_LOONGSON64
1378 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1380 Loongson-2E/2F is not covered here and will be removed in future.
1384 depends on SYS_HAS_CPU_LOONGSON2E
1395 depends on SYS_HAS_CPU_LOONGSON2F
1401 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1406 bool "Loongson 32-bit CPU"
1407 depends on SYS_HAS_CPU_LOONGSON32
1422 depends on SYS_HAS_CPU_MIPS32_R1
1428 MIPS32 architecture. Most modern embedded systems with a 32-bit
1429 MIPS processor are based on a MIPS32 processor. If you know the
1439 depends on SYS_HAS_CPU_MIPS32_R2
1446 MIPS32 architecture. Most modern embedded systems with a 32-bit
1447 MIPS processor are based on a MIPS32 processor. If you know the
1453 depends on SYS_HAS_CPU_MIPS32_R5
1463 family, are based on a MIPS32r5 processor. If you own an older
1468 depends on SYS_HAS_CPU_MIPS32_R6
1479 family, are based on a MIPS32r6 processor. If you own an older
1484 depends on SYS_HAS_CPU_MIPS64_R1
1492 MIPS64 architecture. Many modern embedded systems with a 64-bit
1493 MIPS processor are based on a MIPS64 processor. If you know the
1503 depends on SYS_HAS_CPU_MIPS64_R2
1512 MIPS64 architecture. Many modern embedded systems with a 64-bit
1513 MIPS processor are based on a MIPS64 processor. If you know the
1519 depends on SYS_HAS_CPU_MIPS64_R5
1532 any hardware known to be based on this release.
1536 depends on SYS_HAS_CPU_MIPS64_R6
1549 family, are based on a MIPS64r6 processor. If you own an older
1554 depends on SYS_HAS_CPU_P5600
1566 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1567 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1569 cache, IOCU/IOMMU (though might be unused depending on the system-
1575 depends on SYS_HAS_CPU_R3000
1583 *not* work on R4000 machines and vice versa. However, since most
1590 depends on SYS_HAS_CPU_R4300
1594 MIPS Technologies R4300-series processors.
1598 depends on SYS_HAS_CPU_R4X00
1603 MIPS Technologies R4000-series processors other than 4300, including
1608 depends on SYS_HAS_CPU_TX49XX
1616 depends on SYS_HAS_CPU_R5000
1621 MIPS Technologies R5000-series processors other than the Nevada.
1625 depends on SYS_HAS_CPU_R5500
1630 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1635 depends on SYS_HAS_CPU_NEVADA
1640 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1644 depends on SYS_HAS_CPU_R10000
1651 MIPS Technologies R10000-series processors.
1655 depends on SYS_HAS_CPU_RM7000
1664 depends on SYS_HAS_CPU_SB1
1673 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1693 depends on SYS_HAS_CPU_BMIPS
1715 bool "New Loongson-3 CPU Enhancements"
1716 default n
1717 depends on CPU_LOONGSON64
1719 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1720 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1721 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1722 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1726 time. If you want a generic kernel to run on all Loongson 3 machines,
1727 please say 'N' here. If you want a high-performance kernel to run on
1728 new Loongson-3 machines only, please say 'Y' here.
1731 bool "Loongson-3 LLSC Workarounds"
1732 default y if SMP
1733 depends on CPU_LOONGSON64
1735 Loongson-3 processors have the llsc issues which require workarounds.
1741 bool "Emulate the CPUCFG instruction on older Loongson cores"
1742 default y
1743 depends on CPU_LOONGSON64
1745 Loongson-3A R4 and newer have the CPUCFG instruction available for
1746 userland to query CPU capabilities, much like CPUID on x86. This
1747 option provides emulation of the instruction on older Loongson
1748 cores, back to Loongson-3A1000.
1754 depends on SYS_HAS_CPU_MIPS32_R3_5
1755 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1764 depends on CPU_MIPS32_3_5_FEATURES
1766 default y
1769 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1775 depends on SYS_HAS_CPU_MIPS32_R5
1776 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1784 depends on CPU_MIPS32_R5_FEATURES
1785 depends on !EVA
1786 depends on !PAGE_SIZE_4KB
1787 depends on SYS_SUPPORTS_HIGHMEM
1791 default n
1794 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1796 than 40 bits. Note that this has the side effect of turning on
1797 64-bit addressing which in turn makes the PTEs 64-bit in size.
1809 default y
1816 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1819 are needed. The workarounds have no significant side effect on them
1821 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1976 # CPU may reorder R->R, R->W, W->R, W->W
1984 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1995 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2000 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2008 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2012 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2019 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2026 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2035 default 1 if CPU_MIPSR1
2036 default 2 if CPU_MIPSR2
2037 default 5 if CPU_MIPSR5
2038 default 6 if CPU_MIPSR6
2039 default 0
2064 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2069 depends on 64BIT
2070 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2077 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2085 actually benefits from 64-bit processing or if your machine has
2087 menu if your system does not support both 32-bit and 64-bit kernels.
2090 bool "32-bit kernel"
2091 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2094 Select this option if you want to build a 32-bit kernel.
2097 bool "64-bit kernel"
2098 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2100 Select this option if you want to build a 64-bit kernel.
2106 depends on 64BIT
2109 memory. Default is 40 bits or less, depending on the CPU.
2119 default 0xffffffff80400000 if BCM47XX
2120 default 0x0
2121 depends on SYS_SUPPORTS_ZBOOT
2125 This is only used if non-zero.
2129 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2130 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2131 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2132 default "10"
2152 # Support for a MIPS32 / MIPS64 style S-caches
2168 depends on CPU_SB1
2179 default y if !CPU_R3000
2183 default y
2198 depends on MIPS_FP_SUPPORT
2199 default y if CPU_R3000
2206 depends on MIPS_FP_SUPPORT
2207 default y if !CPU_R2300_FPU
2211 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2214 bool "MIPS MT SMP support (1 TC on each available VPE)"
2215 default y
2216 depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
2217 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
2229 on cores with the MT ASE and uses the available VPEs to implement
2232 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2241 bool "Dynamic FPU affinity for FP-intensive threads"
2242 default y
2243 depends on MIPS_MT_SMP
2246 bool "MIPS R2-to-R6 emulator"
2247 depends on CPU_MIPSR6
2248 depends on MIPS_FP_SUPPORT
2249 default y
2251 Choose this option if you want to run non-R6 MIPS userland code.
2253 default. You can enable it using the 'mipsr2emu' kernel option.
2254 The only reason this is a build-time option is to save ~14K from the
2259 depends on SYS_SUPPORTS_MULTITHREADING
2266 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2276 default "y"
2277 depends on MIPS_VPE_LOADER
2281 depends on MIPS_VPE_LOADER
2282 default y
2291 depends on MIPS_VPE_LOADER
2295 default "y"
2296 depends on MIPS_VPE_APSP_API
2300 depends on SYS_SUPPORTS_MIPS_CPS
2320 depends on MIPS_CPS
2332 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2333 default y
2337 depends on CPU_SB1 && CPU_SB1_PASS_2
2338 default y
2349 depends on SYS_SUPPORTS_SMARTMIPS
2356 this option will not work on a MIPS core without SmartMIPS core. If
2361 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2371 depends on CPU_SUPPORTS_MSA
2372 depends on MIPS_FP_SUPPORT
2373 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2376 and a set of SIMD instructions to operate on them. When this option
2379 running on CPUs which do not support MSA or that your userland will
2392 depends on !CPU_DIEI_BROKEN
2423 depends on !CPU_R3000
2424 default y
2427 # CPU non-features
2432 # - The `daddi' instruction fails to trap on overflow.
2436 # - The `daddiu' instruction can produce an incorrect result.
2448 # - A double-word or a variable shift may give an incorrect result
2455 # - A double-word or a variable shift may give an incorrect result
2460 # - An integer division may give an incorrect result if started in
2470 # - A double-word or a variable shift may give an incorrect result
2479 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2483 default 6 if CPU_R3000
2484 default 0
2488 default 0 if MIPS_ASID_BITS_VARIABLE
2489 default 6 if CPU_R3000
2490 default 8
2497 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2536 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2549 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2551 # I-cache line worth of instructions being fetched may case spurious
2556 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2557 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2566 # - Highmem only makes sense for the 32-bit kernel.
2567 # - The current highmem code will only work properly on physically indexed
2570 # moment we protect the user and offer the highmem option only on machines
2571 # where it's known to be safe. This will not offer highmem on a few systems
2574 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2580 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2598 This option must be set if a kernel might be executed on a MIPS16-
2600 words, it makes the kernel MIPS16-tolerant.
2607 depends on !NUMA && !CPU_LOONGSON2EF
2614 depends on SYS_SUPPORTS_NUMA
2619 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2620 Access). This option improves performance on systems with more
2621 than two nodes; on two node systems it is generally better to
2622 leave it disabled; on single node systems leave this option
2630 depends on SYS_SUPPORTS_RELOCATABLE
2631 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2639 so it can be loaded someplace besides the default 1MB.
2645 depends on RELOCATABLE
2647 default "0x00200000" if CPU_LOONGSON64
2648 default "0x00100000"
2654 adjusted, although the default of 1Mb should be ok in most cases.
2658 If unsure, leave at the default value.
2662 depends on RELOCATABLE
2666 deters exploit attempts relying on knowledge of the location
2677 depends on RANDOMIZE_BASE
2680 default "0x01000000"
2687 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2688 EVA or 64-bit. The default is 16Mb.
2692 default "6"
2693 depends on NUMA
2697 …depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON …
2698 default y
2705 depends on MACH_LOONGSON64
2707 default y
2715 bool "Multi-Processing support"
2716 depends on SYS_SUPPORTS_SMP
2722 If you say N here, the kernel will run on uni- and multiprocessor
2724 you say Y here, the kernel will run on many, but not all,
2725 uniprocessor machines. On a uniprocessor machine, the kernel
2731 See also the SMP-HOWTO available at
2737 bool "Support for hot-pluggable CPUs"
2738 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2740 Say Y here to allow turning CPUs off and on. CPUs can be
2743 automatically on SMP systems. )
2771 int "Maximum number of CPUs (2-256)"
2773 depends on SMP
2774 default "4" if NR_CPUS_DEFAULT_4
2775 default "8" if NR_CPUS_DEFAULT_8
2776 default "16" if NR_CPUS_DEFAULT_16
2777 default "32" if NR_CPUS_DEFAULT_32
2778 default "64" if NR_CPUS_DEFAULT_64
2781 kernel will support. The maximum supported value is 32 for 32-bit
2782 kernel and 64 for 64-bit kernels; the minimum value which makes
2786 This is purely to save memory - each supported CPU adds
2799 depends on SMP
2800 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2801 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2809 default HZ_250
2865 default y if !SYS_SUPPORTS_24HZ && \
2876 default 24 if HZ_24
2877 default 48 if HZ_48
2878 default 100 if HZ_100
2879 default 128 if HZ_128
2880 default 250 if HZ_250
2881 default 256 if HZ_256
2882 default 1000 if HZ_1000
2883 default 1024 if HZ_1024
2899 default "0xffffffff84000000"
2900 depends on CRASH_DUMP
2906 passed to the panic-ed kernel).
2909 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2910 depends on 32BIT || MIPS32_O32
2912 When this is enabled, the kernel will support use of 64-bit floating
2914 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2915 32-bit MIPS systems this support is at the cost of increasing the
2918 will require 64-bit floating point, you may wish to reduce the size
2924 worked on. In order to avoid userland becoming dependent upon current
2945 depends on USE_OF
2946 default MIPS_NO_APPENDED_DTB
2957 DTB) included in the vmlinux ELF section .appended_dtb. By default
2961 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2987 depends on !CMDLINE_OVERRIDE
2988 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2991 default MIPS_CMDLINE_FROM_BOOTLOADER
2994 depends on USE_OF
2998 depends on USE_OF
3005 depends on CMDLINE_BOOL
3013 default y
3017 default y
3021 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3022 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3023 default 2
3041 # or other ISA chip on the board that users don't know about so don't expect
3049 depends on MACH_DECSTATION
3056 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3058 <http://www.linux-mips.org/wiki/DECstation>
3062 default y
3065 default 12 if 64BIT
3066 default 8
3069 default 18 if 64BIT
3070 default 15
3073 default 8
3076 default 15
3096 depends on 64BIT
3102 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3109 depends on 64BIT
3115 64-bit binaries using 32-bit quantities for addressing and certain
3116 data that would normally be 64-bit. They are used in special
3123 depends on $(cc-option,-mno-branch-likely)
3125 # https://github.com/llvm/llvm-project/issues/61045
3133 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3137 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP