Lines Matching +full:two +full:- +full:ethernet
1 /* SPDX-License-Identifier: GPL-2.0 */
6 * by the VIAs (Ethernet, DSP, SCC, Sound). This includes nine DMA
9 * The first seven DMA channels appear to be "one-shot" and are actually
10 * sets of two channels; one member is active while the other is being
12 * The one-shot channels are grouped together and are:
15 * 2. Ethernet Read
16 * 3. Ethernet Write
22 * The remaining two channels are handled somewhat differently. They appear
28 * Much of this was extrapolated from what was known about the Ethernet
30 * machine with easy-to-find patterns and looking for them in the DMA
34 * 1999-05-25 (jmt)
52 * One-shot DMA control registers
103 * Free-running DMA registers. The only part known for sure are the bits in
107 * These registers seem to be mirrored every thirty-two bytes up until offset
112 * [ 16-bit ]
122 * bit 6 : Set to one to enable pass-thru
134 * These two bits control the sample
148 * 0x0202 - 0x0203 is unused. Writing there
153 * [ 32-bit ]
156 * bits 12-15 : input source volume, 0 - F
157 * bits 16-19 : unknown, always 0x5
158 * bits 20-23 : input source selection:
167 * [ 32-bit ]
168 * Appears to be a read-only status register.
172 * [ 16-bit ]
173 * Unknown 16-bit value, always 0x0000.
176 * [ 16-bit ]
185 * [ 32-bit ]
189 * [ 32-bit ]
193 * [ 16-bit ]
194 * Length of both buffers in eight-byte units.
197 * [ 16-bit ]
201 * [ 16-bit ]
202 * Appears to e a read-only status register.
206 * [ 16-bit ]