91     ATARIHW_DECLARE(FDCSPEED);		/* 8/16 MHz switch for FDC */
120  * MFP always has a 8 MHz clock. This avoids problems with the varying length
625 #define ACIA_D8N2S (4<<2)	/* 8 data, no parity, 2 stop */
626 #define ACIA_D8N1S (5<<2)	/* 8 data, no parity, 1 stop */
627 #define ACIA_D8E1S (6<<2)	/* 8 data, even parity, 1 stop */
628 #define ACIA_D8O1S (7<<2)	/* 8 data, odd parity, 1 stop */
728 	tt_dmasnd.bas_mid = (unsigned char)(((bufstart) & 0x00ff00) >> 8); \
733 			(tt_dmasnd.addr_mid << 8) +	\
739 	tt_dmasnd.end_mid = (unsigned char)(((bufend) & 0x00ff00) >> 8); \
753 #define	MW_LM1992_VOLUME(dB)	\  argument
754     (0x0c0 | ((dB) < -80 ? 0 : (dB) > 0 ? 40 : (((dB) + 80) / 2)))
755 #define	MW_LM1992_BALLEFT(dB)	\  argument
756     (0x140 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
757 #define	MW_LM1992_BALRIGHT(dB)	\  argument
758     (0x100 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
759 #define	MW_LM1992_TREBLE(dB)	\  argument
760     (0x080 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))
761 #define	MW_LM1992_BASS(dB)	\  argument
762     (0x040 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))