Lines Matching +full:no +full:- +full:ref +full:- +full:high +full:- +full:z
3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
17 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21 Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
26 No licenses are granted by implication, estoppel or otherwise under any patents label
98 mov.l %d0,-(%sp)
99 mov.l (_060FPSP_TABLE-0x80+_off_done,%pc),%d0
100 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
106 mov.l %d0,-(%sp)
107 mov.l (_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0
108 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
114 mov.l %d0,-(%sp)
115 mov.l (_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0
116 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
122 mov.l %d0,-(%sp)
123 mov.l (_060FPSP_TABLE-0x80+_off_inex,%pc),%d0
124 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
130 mov.l %d0,-(%sp)
131 mov.l (_060FPSP_TABLE-0x80+_off_bsun,%pc),%d0
132 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
138 mov.l %d0,-(%sp)
139 mov.l (_060FPSP_TABLE-0x80+_off_operr,%pc),%d0
140 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
146 mov.l %d0,-(%sp)
147 mov.l (_060FPSP_TABLE-0x80+_off_snan,%pc),%d0
148 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
154 mov.l %d0,-(%sp)
155 mov.l (_060FPSP_TABLE-0x80+_off_dz,%pc),%d0
156 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
162 mov.l %d0,-(%sp)
163 mov.l (_060FPSP_TABLE-0x80+_off_fline,%pc),%d0
164 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
170 mov.l %d0,-(%sp)
171 mov.l (_060FPSP_TABLE-0x80+_off_fpu_dis,%pc),%d0
172 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
178 mov.l %d0,-(%sp)
179 mov.l (_060FPSP_TABLE-0x80+_off_trap,%pc),%d0
180 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
186 mov.l %d0,-(%sp)
187 mov.l (_060FPSP_TABLE-0x80+_off_trace,%pc),%d0
188 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
194 mov.l %d0,-(%sp)
195 mov.l (_060FPSP_TABLE-0x80+_off_access,%pc),%d0
196 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
204 mov.l %d0,-(%sp)
205 mov.l (_060FPSP_TABLE-0x80+_off_imr,%pc),%d0
206 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
212 mov.l %d0,-(%sp)
213 mov.l (_060FPSP_TABLE-0x80+_off_dmr,%pc),%d0
214 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
220 mov.l %d0,-(%sp)
221 mov.l (_060FPSP_TABLE-0x80+_off_dmw,%pc),%d0
222 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
228 mov.l %d0,-(%sp)
229 mov.l (_060FPSP_TABLE-0x80+_off_irw,%pc),%d0
230 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
236 mov.l %d0,-(%sp)
237 mov.l (_060FPSP_TABLE-0x80+_off_irl,%pc),%d0
238 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
244 mov.l %d0,-(%sp)
245 mov.l (_060FPSP_TABLE-0x80+_off_drb,%pc),%d0
246 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
252 mov.l %d0,-(%sp)
253 mov.l (_060FPSP_TABLE-0x80+_off_drw,%pc),%d0
254 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
260 mov.l %d0,-(%sp)
261 mov.l (_060FPSP_TABLE-0x80+_off_drl,%pc),%d0
262 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
268 mov.l %d0,-(%sp)
269 mov.l (_060FPSP_TABLE-0x80+_off_dwb,%pc),%d0
270 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
276 mov.l %d0,-(%sp)
277 mov.l (_060FPSP_TABLE-0x80+_off_dww,%pc),%d0
278 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
284 mov.l %d0,-(%sp)
285 mov.l (_060FPSP_TABLE-0x80+_off_dwl,%pc),%d0
286 pea.l (_060FPSP_TABLE-0x80,%pc,%d0)
296 set LV, -LOCAL_SIZE # stack offset
305 set EXC_AREGS, -68 # offset of all address regs
306 set EXC_DREGS, -100 # offset of all data regs
307 set EXC_FPREGS, -36 # offset of all fp regs
492 set nzi_mask, 0x01ffffff #clears N, Z, and I
523 set rn_mode, 0x0 # round-to-nearest
524 set rz_mode, 0x1 # round-to-zero
525 set rm_mode, 0x2 # round-tp-minus-infinity
526 set rp_mode, 0x3 # round-to-plus-infinity
548 set mda7_flg, 0x08 # flag bit: -(a7) <ea>
559 # TRANSCENDENTAL "LAST-OP" FLAGS #
586 # _imem_read_long() - read instruction longword #
587 # fix_skewed_ops() - adjust src operand in fsave frame #
588 # set_tag_x() - determine optype of src/dst operands #
589 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
590 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
591 # load_fpn2() - load dst operand from FP regfile #
592 # fout() - emulate an opclass 3 instruction #
593 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
594 # _fpsp_done() - "callout" for 060FPSP exit (all work done!) #
595 # _real_ovfl() - "callout" for Overflow exception enabled code #
596 # _real_inex() - "callout" for Inexact exception enabled code #
597 # _real_trace() - "callout" for Trace exception code #
600 # - The system stack contains the FP Ovfl exception stack frame #
601 # - The fsave frame contains the source operand #
605 # - The system stack is unchanged #
606 # - The fsave frame contains the adjusted src op for opclass 0,2 #
608 # - The system stack is unchanged #
609 # - The "exception present" flag in the fsave frame is cleared #
619 # denoting that no exceptional conditions exist within the machine. #
641 link.w %a6,&-LOCAL_SIZE # init stack frame
645 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
647 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
683 bne.b fovfl_op2_done # no
731 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
733 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
746 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
748 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
765 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
767 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
804 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
806 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
812 beq.l _fpsp_done # no
826 # _imem_read_long() - read instruction longword #
827 # fix_skewed_ops() - adjust src operand in fsave frame #
828 # set_tag_x() - determine optype of src/dst operands #
829 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
830 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
831 # load_fpn2() - load dst operand from FP regfile #
832 # fout() - emulate an opclass 3 instruction #
833 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
834 # _fpsp_done() - "callout" for 060FPSP exit (all work done!) #
835 # _real_ovfl() - "callout" for Overflow exception enabled code #
836 # _real_inex() - "callout" for Inexact exception enabled code #
837 # _real_trace() - "callout" for Trace exception code #
840 # - The system stack contains the FP Unfl exception stack frame #
841 # - The fsave frame contains the source operand #
845 # - The system stack is unchanged #
846 # - The fsave frame contains the adjusted src op for opclass 0,2 #
848 # - The system stack is unchanged #
849 # - The "exception present" flag in the fsave frame is cleared #
859 # denoting that no exceptional conditions exist within the machine. #
881 link.w %a6,&-LOCAL_SIZE # init stack frame
885 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
887 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
926 bne.b funfl_op2_done # no
965 # if our emulation, after re-doing the operation, decided that
966 # no underflow was called for. We do these checks only in
981 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
983 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
998 # if our emulation, after re-doing the operation, decided that
999 # no underflow was called for.
1008 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
1010 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1039 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
1041 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1078 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
1080 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1086 beq.l _fpsp_done # no
1101 # _imem_read_{word,long}() - read instruction word/longword #
1102 # fix_skewed_ops() - adjust src operand in fsave frame #
1103 # set_tag_x() - determine optype of src/dst operands #
1104 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
1105 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
1106 # load_fpn2() - load dst operand from FP regfile #
1107 # load_fpn1() - load src operand from FP regfile #
1108 # fout() - emulate an opclass 3 instruction #
1109 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
1110 # _real_inex() - "callout" to operating system inexact handler #
1111 # _fpsp_done() - "callout" for exit; work all done #
1112 # _real_trace() - "callout" for Trace enabled exception #
1113 # funimp_skew() - adjust fsave src ops to "incorrect" value #
1114 # _real_snan() - "callout" for SNAN exception #
1115 # _real_operr() - "callout" for OPERR exception #
1116 # _real_ovfl() - "callout" for OVFL exception #
1117 # _real_unfl() - "callout" for UNFL exception #
1118 # get_packed() - fetch packed operand from memory #
1121 # - The system stack contains the "Unimp Data Type" stk frame #
1122 # - The fsave frame contains the ssrc op (for UNNORM/DENORM) #
1126 # - The system stack is changed to an Inexact exception stk frame #
1128 # - The system stack is changed to an SNAN exception stk frame #
1130 # - The system stack is changed to an OPERR exception stk frame #
1132 # - The system stack is changed to an OVFL exception stk frame #
1134 # - The system stack is changed to an UNFL exception stack frame #
1136 # - The system stack is changed to a Trace exception stack frame #
1138 # - Correct result has been stored as appropriate #
1163 # performed by calling the routine fout(). If no exception should occur #
1177 # post-instruction
1180 # pre-instruction * *
1206 link.w %a6,&-LOCAL_SIZE # init stack frame
1210 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
1212 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
1242 # Separate opclass three (fpn-to-mem) ops since they have a different
1254 # so, since the emulation routines re-create them anyways, zero exception field
1260 # Opclass two w/ memory-to-fpn operation will have an incorrect extended
1272 bne.b fu_op2 # no
1292 bne.b fu_op2_done # no
1313 # OPERR : fsqrt(-NORM)
1329 andi.b &0x38,%d0 # extract bits 3-5
1340 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1352 # No exceptions occurred that were also enabled. Now:
1362 beq.b fu_in_cont # no
1366 beq.b fu_in_cont # no
1377 # * there will be no other way to pass it the exceptional operand
1385 subi.l &24,%d0 # fix offset to be 0-8
1387 bne.b fu_in_exc_exit # no
1399 mov.l %d0,-(%sp) # save d0
1407 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1437 rts # no
1444 cmpi.w %d0,&0x407f # no; is |exp| == $407f?
1446 rts # no
1449 andi.l &0x7fffffff,LOCAL_HI(%a0) # clear j-bit
1454 neg.w %d0 # -shft amt
1465 andi.b &0x7f,LOCAL_HI(%a0) # clear j-bit
1474 cmpi.w %d0,&0x43ff # no; is |exp| == $43ff?
1476 rts # no
1479 andi.l &0x7fffffff,LOCAL_HI(%a0) # clear j-bit
1486 neg.w %d0 # -shft amt
1508 # so, since the emulation routines re-create them anyways, zero exception field.
1558 # on extended precision opclass three instructions using pre-decrement or
1559 # post-increment addressing mode, the address register is not updated. is the
1572 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1581 # is the ea mode pre-decrement of the stack pointer from supervisor mode?
1582 # ("fmov.x fpm,-(a7)") if so,
1589 # here, we're counting on the top of the stack to be the old place-holders
1596 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1600 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
1601 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
1608 add.l &LOCAL_SIZE-0x8,%sp
1620 # no exceptions were set.
1624 beq.w fu_out_done # no
1628 beq.w fu_out_done # no
1656 subi.l &24,%d0 # fix offset to be 0-8
1658 # we don't mess with the existing fsave frame. just re-insert it and
1665 short tbl_fu_out - tbl_fu_out # BSUN can't happen
1666 short tbl_fu_out - tbl_fu_out # SNAN can't happen
1667 short fu_operr - tbl_fu_out # OPERR
1668 short fu_ovfl - tbl_fu_out # OVFL
1669 short fu_unfl - tbl_fu_out # UNFL
1670 short tbl_fu_out - tbl_fu_out # DZ can't happen
1671 short fu_inex - tbl_fu_out # INEX2
1672 short tbl_fu_out - tbl_fu_out # INEX1 won't make it here
1679 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1694 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1711 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1740 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1752 cmpi.b SPCOND_FLG(%a6),&mda7_flg # was the <ea> mode -(sp)?
1764 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1773 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
1774 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
1775 mov.l LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)
1782 add.l &LOCAL_SIZE-0x8,%sp
1792 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1810 # so, since the emulation routines re-create them anyways, zero exception field
1837 bne.b fu_op2_done_p # no
1858 # OPERR : fsqrt(-NORM)
1874 andi.b &0x38,%d0 # extract bits 3-5
1892 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1906 beq.b fu_in_exit_cont_p # no
1910 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
1930 # No exceptions occurred that were also enabled. Now:
1940 beq.w fu_in_cont_p # no
1944 beq.w fu_in_cont_p # no
1955 # * there will be no other way to pass it the exceptional operand
1963 subi.l &24,%d0 # fix offset to be 0-8
1965 blt.b fu_in_exc_exit_p # no
1977 # "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
1991 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2022 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2067 # so, since the emulation routines re-create them anyways, zero exception field.
2082 bne.b fu_op2_p # no
2097 # BSUN : no
2100 # OVFL : no
2101 # UNFL : no
2102 # DZ : no
2104 # INEX1 : no
2123 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2133 # addressing mode was -(a7). if so, we'll need to shift the
2136 btst &mda7_bit,SPCOND_FLG(%a6) # was ea mode -(a7)
2137 beq.b fu_out_exit_cont_p # no
2141 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2145 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
2146 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
2153 add.l &LOCAL_SIZE-0x8,%sp
2186 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2191 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2200 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
2201 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
2202 mov.l LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)
2209 add.l &LOCAL_SIZE-0x8,%sp
2226 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2231 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2240 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
2241 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
2242 mov.l LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)
2249 add.l &LOCAL_SIZE-0x8,%sp
2266 # the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
2271 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2280 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
2281 mov.l LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
2282 mov.l LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)
2289 add.l &LOCAL_SIZE-0x8,%sp
2320 bset &31,%d1 # set j-bit
2343 beq.b fss_dbl_denorm_done # no
2346 bset &0x7,FP_SRC_HI(%a6) # set j-bit
2372 # _imem_read_long() - read instruction longword #
2373 # fix_skewed_ops() - adjust src operand in fsave frame #
2374 # set_tag_x() - determine optype of src/dst operands #
2375 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
2376 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
2377 # load_fpn2() - load dst operand from FP regfile #
2378 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
2379 # decbin() - convert packed data to FP binary data #
2380 # _real_fpu_disabled() - "callout" for "FPU disabled" exception #
2381 # _real_access() - "callout" for access error exception #
2382 # _mem_read() - read extended immediate operand from memory #
2383 # _fpsp_done() - "callout" for exit; work all done #
2384 # _real_trace() - "callout" for Trace enabled exception #
2385 # fmovm_dynamic() - emulate dynamic fmovm instruction #
2386 # fmovm_ctrl() - emulate fmovm control instruction #
2389 # - The system stack contains the "Unimplemented <ea>" stk frame #
2393 # - The system stack is changed to an access error stack frame #
2395 # - The system stack is changed to an FPU disabled stack frame #
2397 # - The system stack is changed to a Trace exception stack frame #
2399 # - None (correct result has been stored as appropriate) #
2411 # word. If no FP exception should be reported ads a result of the #
2419 # stack frame. If no Trace is pending, we simply exit through #
2422 # decode and emulate the instruction. No FP exceptions can be pending #
2426 # For the case of "fmovm.x Dn,-(a7)", where the offending instruction #
2447 # frame. This information includes a faulting address and a fault- #
2448 # status-longword. These are created within this handler. #
2458 mov.l %d0,-(%sp) # save d0
2464 link %a6,&-LOCAL_SIZE # init stack frame
2466 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
2468 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
2556 bne.b iea_op_getdst # no
2575 bne.b iea_op_extract # no
2610 # OPERR : all reg-reg or mem-reg operations that can normally operr
2627 bne.b iea_op_exit1 # exit with no frestore
2637 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
2639 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2653 # no exception occurred. now, did a disabled, exact overflow occur with inexact
2660 beq.b iea_op_store # no
2666 subi.l &24,%d0 # fix offset to be 0-8
2668 bne.b iea_op_exc_force # no
2697 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
2699 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2728 mov.l (%sp),-(%sp) # shift stack frame "down"
2779 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
2781 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2788 mov.w EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2789 mov.l EXC_EXTWPTR(%a6),(EXC_PC-0x4,%a6,%d0)
2790 mov.w &0x2024,(EXC_VOFF-0x4,%a6,%d0)
2791 mov.l EXC_PC(%a6),(EXC_VOFF+0x2-0x4,%a6,%d0)
2793 lea (EXC_SR-0x4,%a6,%d0),%a0
2796 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
2798 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2809 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
2811 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2813 mov.l (%a6),-(%sp) # make a copy of a6
2814 mov.l %d0,-(%sp) # save d0
2815 mov.l %d1,-(%sp) # save d1
2816 mov.l EXC_EXTWPTR(%a6),-(%sp) # make a copy of Next PC
2825 mov.w EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2826 mov.l EXC_PC(%a6),(EXC_VOFF-0x2,%a6,%d0)
2827 mov.l (%sp)+,(EXC_PC-0x4,%a6,%d0)
2828 mov.w &0x2024,(EXC_VOFF-0x4,%a6,%d0)
2898 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
2900 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2930 # -restore a6 (not with unlk)
2931 # -shift stack frame down over where old a6 used to be
2932 # -add LOCAL_SIZE to stack pointer
2945 # F Emulator" exception. So, here we create an 8-word stack frame
2946 # from our 4-word stack frame. This means we must calculate the length
2953 link %a6,&-LOCAL_SIZE # init stack frame
2955 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
2973 bne.b iea_dis_fmovm_data # no
2984 # as a by-product, will tell us how long the instruction is.
2993 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
2997 # here, we actually create the 8-word frame from the 4-word frame,
3001 mov.l %d0,-(%sp) # save d0
3020 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1 on stack
3022 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3042 lea -LOCAL_SIZE(%a6),%sp
3047 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1 on stack
3052 mov.l 0x4+LOCAL_SIZE(%sp),-0x8+0x4+LOCAL_SIZE(%sp)
3053 mov.w 0x8+LOCAL_SIZE(%sp),-0x8+0x8+LOCAL_SIZE(%sp)
3054 mov.w &0x4008,-0x8+0xa+LOCAL_SIZE(%sp)
3055 mov.l %a0,-0x8+0xc+LOCAL_SIZE(%sp)
3056 mov.w %d0,-0x8+0x10+LOCAL_SIZE(%sp)
3057 mov.w &0x0001,-0x8+0x12+LOCAL_SIZE(%sp)
3059 movm.l LOCAL_SIZE+EXC_DREGS(%sp),&0x0303 # restore d0-d1/a0-a1
3060 add.w &LOCAL_SIZE-0x4,%sp
3072 # _imem_read_long() - read instruction longword #
3073 # fix_skewed_ops() - adjust src operand in fsave frame #
3074 # _real_operr() - "callout" to operating system operr handler #
3075 # _dmem_write_{byte,word,long}() - store data to mem (opclass 3) #
3076 # store_dreg_{b,w,l}() - store data to data regfile (opclass 3) #
3077 # facc_out_{b,w,l}() - store to memory took access error (opcl 3) #
3080 # - The system stack contains the FP Operr exception frame #
3081 # - The fsave frame contains the source operand #
3084 # No access error: #
3085 # - The system stack is unchanged #
3086 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3109 link.w %a6,&-LOCAL_SIZE # init stack frame
3113 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
3115 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
3139 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
3141 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3196 short foperr_out_l - tbl_operr # long word integer
3197 short tbl_operr - tbl_operr # sgl prec shouldn't happen
3198 short tbl_operr - tbl_operr # ext prec shouldn't happen
3199 short foperr_exit - tbl_operr # packed won't enter here
3200 short foperr_out_w - tbl_operr # word integer
3201 short tbl_operr - tbl_operr # dbl prec shouldn't happen
3202 short foperr_out_b - tbl_operr # byte integer
3203 short tbl_operr - tbl_operr # packed won't enter here
3261 # _imem_read_long() - read instruction longword #
3262 # fix_skewed_ops() - adjust src operand in fsave frame #
3263 # _real_snan() - "callout" to operating system SNAN handler #
3264 # _dmem_write_{byte,word,long}() - store data to mem (opclass 3) #
3265 # store_dreg_{b,w,l}() - store data to data regfile (opclass 3) #
3266 # facc_out_{b,w,l,d,x}() - store to mem took acc error (opcl 3) #
3267 # _calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea> #
3270 # - The system stack contains the FP SNAN exception frame #
3271 # - The fsave frame contains the source operand #
3274 # No access error: #
3275 # - The system stack is unchanged #
3276 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3294 # if the effective addressing mode was -() or ()+, then the address #
3296 # was -(a7) from supervisor mode, then the exception frame currently #
3305 link.w %a6,&-LOCAL_SIZE # init stack frame
3309 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
3311 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
3335 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
3337 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3366 short fsnan_out_l - tbl_snan # long word integer
3367 short fsnan_out_s - tbl_snan # sgl prec shouldn't happen
3368 short fsnan_out_x - tbl_snan # ext prec shouldn't happen
3369 short tbl_snan - tbl_snan # packed needs no help
3370 short fsnan_out_w - tbl_snan # word integer
3371 short fsnan_out_d - tbl_snan # dbl prec shouldn't happen
3372 short fsnan_out_b - tbl_snan # byte integer
3373 short tbl_snan - tbl_snan # packed needs no help
3446 mov.l %d1,-(%sp)
3481 # for extended precision, if the addressing mode is pre-decrement or
3482 # post-increment, then the address register did not get updated.
3483 # in addition, for pre-decrement, the stacked <ea> is incorrect.
3528 cmpi.b SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
3529 bne.b fsnan_out_x_save # no
3531 # the operation was "fmove.x SNAN,-(a7)" from supervisor mode.
3532 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
3534 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3540 mov.l LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
3541 mov.l LOCAL_SIZE+EXC_PC+0x2(%sp),LOCAL_SIZE+EXC_PC+0x2-0xc(%sp)
3542 mov.l LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)
3548 add.l &LOCAL_SIZE-0x8,%sp
3560 # _imem_read_long() - read instruction longword #
3561 # fix_skewed_ops() - adjust src operand in fsave frame #
3562 # set_tag_x() - determine optype of src/dst operands #
3563 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3564 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
3565 # load_fpn2() - load dst operand from FP regfile #
3566 # smovcr() - emulate an "fmovcr" instruction #
3567 # fout() - emulate an opclass 3 instruction #
3568 # tbl_unsupp - add of table of emulation routines for opclass 0,2 #
3569 # _real_inex() - "callout" to operating system inexact handler #
3572 # - The system stack contains the FP Inexact exception frame #
3573 # - The fsave frame contains the source operand #
3576 # - The system stack is unchanged #
3577 # - The fsave frame contains the adjusted src op for opclass 0,2 #
3597 link.w %a6,&-LOCAL_SIZE # init stack frame
3601 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
3603 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
3625 bne.b finex_cont # no
3668 bne.b finex_op2_done # no
3692 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
3694 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3746 # _imem_read_long() - read instruction longword from memory #
3747 # fix_skewed_ops() - adjust fsave operand #
3748 # _real_dz() - "callout" exit point from FP DZ handler #
3751 # - The system stack contains the FP DZ exception stack. #
3752 # - The fsave frame contains the source operand. #
3755 # - The system stack contains the FP DZ exception stack. #
3756 # - The fsave frame contains the adjusted source operand. #
3771 link.w %a6,&-LOCAL_SIZE # init stack frame
3775 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
3777 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1 on stack
3797 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
3799 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3814 # _fpsp_unimp() - handle "FP Unimplemented" exceptions #
3815 # _real_fpu_disabled() - handle "FPU disabled" exceptions #
3816 # _real_fline() - handle "FLINE" exceptions #
3817 # _imem_read_long() - read instruction longword #
3820 # - The system stack contains a "Line F Emulator" exception #
3824 # - The system stack is unchanged #
3837 # non-zero <ea> field. These may get flagged as "Line F" but should #
3856 # the exception was an "F-Line Illegal" exception. we check to see
3857 # if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if
3858 # so, convert the F-Line exception stack frame to an FP Unimplemented
3860 # point for the F-Line exception handler.
3861 link.w %a6,&-LOCAL_SIZE # init stack frame
3863 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
3872 bne.b fline_fline # no
3876 bne.b fline_fline # no
3878 # it's an fmovecr w/ a non-zero <ea> that has entered through
3879 # the F-Line Illegal exception.
3880 # so, we need to convert the F-Line exception stack frame into an
3890 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3904 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3911 mov.l (%sp),-(%sp)
3918 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
3933 # _imem_read_{word,long}() - read instruction word/longword #
3934 # load_fop() - load src/dst ops from memory and/or FP regfile #
3935 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3936 # tbl_trans - addr of table of emulation routines for trnscndls #
3937 # _real_access() - "callout" for access error exception #
3938 # _fpsp_done() - "callout" for exit; work all done #
3939 # _real_trace() - "callout" for Trace enabled exception #
3940 # smovcr() - emulate "fmovecr" instruction #
3941 # funimp_skew() - adjust fsave src ops to "incorrect" value #
3942 # _ftrapcc() - emulate an "ftrapcc" instruction #
3943 # _fdbcc() - emulate an "fdbcc" instruction #
3944 # _fscc() - emulate an "fscc" instruction #
3945 # _real_trap() - "callout" for Trap exception #
3946 # _real_bsun() - "callout" for enabled Bsun exception #
3949 # - The system stack contains the "Unimplemented Instr" stk frame #
3953 # - The system stack is changed to an access error stack frame #
3955 # - The system stack is changed to a Trace exception stack frame #
3957 # - Correct result has been stored as appropriate #
3972 # exceptional or non-exceptional cases, we must check to see if the #
4000 # - EA -
4006 # - Next PC - => PC of instr to execute after exc handling
4019 link.w %a6,&-LOCAL_SIZE # init stack frame
4021 movm.l &0x0303,EXC_DREGS(%a6) # save d0-d1/a0-a1
4023 fmovm.x &0xc0,EXC_FPREGS(%a6) # save fp0-fp1
4026 bne.b funimp_s # no; supervisor mode
4059 # bits 6-8 of the opword(classes 6,7 are undefined).
4105 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4107 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4113 cmpi.b SPCOND_FLG(%a6),&mda7_flg # was the ea mode -(sp) ?
4121 beq.l _fpsp_done # no
4123 # this catches a problem with the case where an exception will be re-inserted
4127 fsave -(%sp)
4137 mov.l %a0,-(%sp)
4148 mov.l %d0,-(%sp) # save d0
4185 # no exception that was enabled was set BUT if we got an exact overflow
4187 # an inexact exception; otherwise, return to normal non-exception flow.
4189 beq.w funimp_store # no; return to normal flow
4194 beq.w funimp_store # no; return to normal flow
4200 subi.l &24,%d0 # fix offset to be 0-8
4202 bne.b funimp_exc_force # no
4219 mov.l %d0,-(%sp) # save d0
4243 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4245 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4282 bne.w funimp_done # no
4303 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4305 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4338 # I am assuming here that an "fs<cc>.b -(An)" or "fs<cc>.b (An)+" instruction
4344 bne.b funimp_fscc_s # no
4351 # remember, I'm assuming that post-increment is bogus...(it IS!!!)
4353 # overwritten by the "fs<cc> -(An)". We must shift the stack frame "down"
4360 bne.w funimp_done # no
4362 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4364 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4410 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4412 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4431 fmovm.x EXC_FP0(%a6),&0xc0 # restore fp0-fp1
4433 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4468 short tbl_trans - tbl_trans # $00-0 fmovecr all
4469 short tbl_trans - tbl_trans # $00-1 fmovecr all
4470 short tbl_trans - tbl_trans # $00-2 fmovecr all
4471 short tbl_trans - tbl_trans # $00-3 fmovecr all
4472 short tbl_trans - tbl_trans # $00-4 fmovecr all
4473 short tbl_trans - tbl_trans # $00-5 fmovecr all
4474 short tbl_trans - tbl_trans # $00-6 fmovecr all
4475 short tbl_trans - tbl_trans # $00-7 fmovecr all
4477 short tbl_trans - tbl_trans # $01-0 fint norm
4478 short tbl_trans - tbl_trans # $01-1 fint zero
4479 short tbl_trans - tbl_trans # $01-2 fint inf
4480 short tbl_trans - tbl_trans # $01-3 fint qnan
4481 short tbl_trans - tbl_trans # $01-5 fint denorm
4482 short tbl_trans - tbl_trans # $01-4 fint snan
4483 short tbl_trans - tbl_trans # $01-6 fint unnorm
4484 short tbl_trans - tbl_trans # $01-7 ERROR
4486 short ssinh - tbl_trans # $02-0 fsinh norm
4487 short src_zero - tbl_trans # $02-1 fsinh zero
4488 short src_inf - tbl_trans # $02-2 fsinh inf
4489 short src_qnan - tbl_trans # $02-3 fsinh qnan
4490 short ssinhd - tbl_trans # $02-5 fsinh denorm
4491 short src_snan - tbl_trans # $02-4 fsinh snan
4492 short tbl_trans - tbl_trans # $02-6 fsinh unnorm
4493 short tbl_trans - tbl_trans # $02-7 ERROR
4495 short tbl_trans - tbl_trans # $03-0 fintrz norm
4496 short tbl_trans - tbl_trans # $03-1 fintrz zero
4497 short tbl_trans - tbl_trans # $03-2 fintrz inf
4498 short tbl_trans - tbl_trans # $03-3 fintrz qnan
4499 short tbl_trans - tbl_trans # $03-5 fintrz denorm
4500 short tbl_trans - tbl_trans # $03-4 fintrz snan
4501 short tbl_trans - tbl_trans # $03-6 fintrz unnorm
4502 short tbl_trans - tbl_trans # $03-7 ERROR
4504 short tbl_trans - tbl_trans # $04-0 fsqrt norm
4505 short tbl_trans - tbl_trans # $04-1 fsqrt zero
4506 short tbl_trans - tbl_trans # $04-2 fsqrt inf
4507 short tbl_trans - tbl_trans # $04-3 fsqrt qnan
4508 short tbl_trans - tbl_trans # $04-5 fsqrt denorm
4509 short tbl_trans - tbl_trans # $04-4 fsqrt snan
4510 short tbl_trans - tbl_trans # $04-6 fsqrt unnorm
4511 short tbl_trans - tbl_trans # $04-7 ERROR
4513 short tbl_trans - tbl_trans # $05-0 ERROR
4514 short tbl_trans - tbl_trans # $05-1 ERROR
4515 short tbl_trans - tbl_trans # $05-2 ERROR
4516 short tbl_trans - tbl_trans # $05-3 ERROR
4517 short tbl_trans - tbl_trans # $05-4 ERROR
4518 short tbl_trans - tbl_trans # $05-5 ERROR
4519 short tbl_trans - tbl_trans # $05-6 ERROR
4520 short tbl_trans - tbl_trans # $05-7 ERROR
4522 short slognp1 - tbl_trans # $06-0 flognp1 norm
4523 short src_zero - tbl_trans # $06-1 flognp1 zero
4524 short sopr_inf - tbl_trans # $06-2 flognp1 inf
4525 short src_qnan - tbl_trans # $06-3 flognp1 qnan
4526 short slognp1d - tbl_trans # $06-5 flognp1 denorm
4527 short src_snan - tbl_trans # $06-4 flognp1 snan
4528 short tbl_trans - tbl_trans # $06-6 flognp1 unnorm
4529 short tbl_trans - tbl_trans # $06-7 ERROR
4531 short tbl_trans - tbl_trans # $07-0 ERROR
4532 short tbl_trans - tbl_trans # $07-1 ERROR
4533 short tbl_trans - tbl_trans # $07-2 ERROR
4534 short tbl_trans - tbl_trans # $07-3 ERROR
4535 short tbl_trans - tbl_trans # $07-4 ERROR
4536 short tbl_trans - tbl_trans # $07-5 ERROR
4537 short tbl_trans - tbl_trans # $07-6 ERROR
4538 short tbl_trans - tbl_trans # $07-7 ERROR
4540 short setoxm1 - tbl_trans # $08-0 fetoxm1 norm
4541 short src_zero - tbl_trans # $08-1 fetoxm1 zero
4542 short setoxm1i - tbl_trans # $08-2 fetoxm1 inf
4543 short src_qnan - tbl_trans # $08-3 fetoxm1 qnan
4544 short setoxm1d - tbl_trans # $08-5 fetoxm1 denorm
4545 short src_snan - tbl_trans # $08-4 fetoxm1 snan
4546 short tbl_trans - tbl_trans # $08-6 fetoxm1 unnorm
4547 short tbl_trans - tbl_trans # $08-7 ERROR
4549 short stanh - tbl_trans # $09-0 ftanh norm
4550 short src_zero - tbl_trans # $09-1 ftanh zero
4551 short src_one - tbl_trans # $09-2 ftanh inf
4552 short src_qnan - tbl_trans # $09-3 ftanh qnan
4553 short stanhd - tbl_trans # $09-5 ftanh denorm
4554 short src_snan - tbl_trans # $09-4 ftanh snan
4555 short tbl_trans - tbl_trans # $09-6 ftanh unnorm
4556 short tbl_trans - tbl_trans # $09-7 ERROR
4558 short satan - tbl_trans # $0a-0 fatan norm
4559 short src_zero - tbl_trans # $0a-1 fatan zero
4560 short spi_2 - tbl_trans # $0a-2 fatan inf
4561 short src_qnan - tbl_trans # $0a-3 fatan qnan
4562 short satand - tbl_trans # $0a-5 fatan denorm
4563 short src_snan - tbl_trans # $0a-4 fatan snan
4564 short tbl_trans - tbl_trans # $0a-6 fatan unnorm
4565 short tbl_trans - tbl_trans # $0a-7 ERROR
4567 short tbl_trans - tbl_trans # $0b-0 ERROR
4568 short tbl_trans - tbl_trans # $0b-1 ERROR
4569 short tbl_trans - tbl_trans # $0b-2 ERROR
4570 short tbl_trans - tbl_trans # $0b-3 ERROR
4571 short tbl_trans - tbl_trans # $0b-4 ERROR
4572 short tbl_trans - tbl_trans # $0b-5 ERROR
4573 short tbl_trans - tbl_trans # $0b-6 ERROR
4574 short tbl_trans - tbl_trans # $0b-7 ERROR
4576 short sasin - tbl_trans # $0c-0 fasin norm
4577 short src_zero - tbl_trans # $0c-1 fasin zero
4578 short t_operr - tbl_trans # $0c-2 fasin inf
4579 short src_qnan - tbl_trans # $0c-3 fasin qnan
4580 short sasind - tbl_trans # $0c-5 fasin denorm
4581 short src_snan - tbl_trans # $0c-4 fasin snan
4582 short tbl_trans - tbl_trans # $0c-6 fasin unnorm
4583 short tbl_trans - tbl_trans # $0c-7 ERROR
4585 short satanh - tbl_trans # $0d-0 fatanh norm
4586 short src_zero - tbl_trans # $0d-1 fatanh zero
4587 short t_operr - tbl_trans # $0d-2 fatanh inf
4588 short src_qnan - tbl_trans # $0d-3 fatanh qnan
4589 short satanhd - tbl_trans # $0d-5 fatanh denorm
4590 short src_snan - tbl_trans # $0d-4 fatanh snan
4591 short tbl_trans - tbl_trans # $0d-6 fatanh unnorm
4592 short tbl_trans - tbl_trans # $0d-7 ERROR
4594 short ssin - tbl_trans # $0e-0 fsin norm
4595 short src_zero - tbl_trans # $0e-1 fsin zero
4596 short t_operr - tbl_trans # $0e-2 fsin inf
4597 short src_qnan - tbl_trans # $0e-3 fsin qnan
4598 short ssind - tbl_trans # $0e-5 fsin denorm
4599 short src_snan - tbl_trans # $0e-4 fsin snan
4600 short tbl_trans - tbl_trans # $0e-6 fsin unnorm
4601 short tbl_trans - tbl_trans # $0e-7 ERROR
4603 short stan - tbl_trans # $0f-0 ftan norm
4604 short src_zero - tbl_trans # $0f-1 ftan zero
4605 short t_operr - tbl_trans # $0f-2 ftan inf
4606 short src_qnan - tbl_trans # $0f-3 ftan qnan
4607 short stand - tbl_trans # $0f-5 ftan denorm
4608 short src_snan - tbl_trans # $0f-4 ftan snan
4609 short tbl_trans - tbl_trans # $0f-6 ftan unnorm
4610 short tbl_trans - tbl_trans # $0f-7 ERROR
4612 short setox - tbl_trans # $10-0 fetox norm
4613 short ld_pone - tbl_trans # $10-1 fetox zero
4614 short szr_inf - tbl_trans # $10-2 fetox inf
4615 short src_qnan - tbl_trans # $10-3 fetox qnan
4616 short setoxd - tbl_trans # $10-5 fetox denorm
4617 short src_snan - tbl_trans # $10-4 fetox snan
4618 short tbl_trans - tbl_trans # $10-6 fetox unnorm
4619 short tbl_trans - tbl_trans # $10-7 ERROR
4621 short stwotox - tbl_trans # $11-0 ftwotox norm
4622 short ld_pone - tbl_trans # $11-1 ftwotox zero
4623 short szr_inf - tbl_trans # $11-2 ftwotox inf
4624 short src_qnan - tbl_trans # $11-3 ftwotox qnan
4625 short stwotoxd - tbl_trans # $11-5 ftwotox denorm
4626 short src_snan - tbl_trans # $11-4 ftwotox snan
4627 short tbl_trans - tbl_trans # $11-6 ftwotox unnorm
4628 short tbl_trans - tbl_trans # $11-7 ERROR
4630 short stentox - tbl_trans # $12-0 ftentox norm
4631 short ld_pone - tbl_trans # $12-1 ftentox zero
4632 short szr_inf - tbl_trans # $12-2 ftentox inf
4633 short src_qnan - tbl_trans # $12-3 ftentox qnan
4634 short stentoxd - tbl_trans # $12-5 ftentox denorm
4635 short src_snan - tbl_trans # $12-4 ftentox snan
4636 short tbl_trans - tbl_trans # $12-6 ftentox unnorm
4637 short tbl_trans - tbl_trans # $12-7 ERROR
4639 short tbl_trans - tbl_trans # $13-0 ERROR
4640 short tbl_trans - tbl_trans # $13-1 ERROR
4641 short tbl_trans - tbl_trans # $13-2 ERROR
4642 short tbl_trans - tbl_trans # $13-3 ERROR
4643 short tbl_trans - tbl_trans # $13-4 ERROR
4644 short tbl_trans - tbl_trans # $13-5 ERROR
4645 short tbl_trans - tbl_trans # $13-6 ERROR
4646 short tbl_trans - tbl_trans # $13-7 ERROR
4648 short slogn - tbl_trans # $14-0 flogn norm
4649 short t_dz2 - tbl_trans # $14-1 flogn zero
4650 short sopr_inf - tbl_trans # $14-2 flogn inf
4651 short src_qnan - tbl_trans # $14-3 flogn qnan
4652 short slognd - tbl_trans # $14-5 flogn denorm
4653 short src_snan - tbl_trans # $14-4 flogn snan
4654 short tbl_trans - tbl_trans # $14-6 flogn unnorm
4655 short tbl_trans - tbl_trans # $14-7 ERROR
4657 short slog10 - tbl_trans # $15-0 flog10 norm
4658 short t_dz2 - tbl_trans # $15-1 flog10 zero
4659 short sopr_inf - tbl_trans # $15-2 flog10 inf
4660 short src_qnan - tbl_trans # $15-3 flog10 qnan
4661 short slog10d - tbl_trans # $15-5 flog10 denorm
4662 short src_snan - tbl_trans # $15-4 flog10 snan
4663 short tbl_trans - tbl_trans # $15-6 flog10 unnorm
4664 short tbl_trans - tbl_trans # $15-7 ERROR
4666 short slog2 - tbl_trans # $16-0 flog2 norm
4667 short t_dz2 - tbl_trans # $16-1 flog2 zero
4668 short sopr_inf - tbl_trans # $16-2 flog2 inf
4669 short src_qnan - tbl_trans # $16-3 flog2 qnan
4670 short slog2d - tbl_trans # $16-5 flog2 denorm
4671 short src_snan - tbl_trans # $16-4 flog2 snan
4672 short tbl_trans - tbl_trans # $16-6 flog2 unnorm
4673 short tbl_trans - tbl_trans # $16-7 ERROR
4675 short tbl_trans - tbl_trans # $17-0 ERROR
4676 short tbl_trans - tbl_trans # $17-1 ERROR
4677 short tbl_trans - tbl_trans # $17-2 ERROR
4678 short tbl_trans - tbl_trans # $17-3 ERROR
4679 short tbl_trans - tbl_trans # $17-4 ERROR
4680 short tbl_trans - tbl_trans # $17-5 ERROR
4681 short tbl_trans - tbl_trans # $17-6 ERROR
4682 short tbl_trans - tbl_trans # $17-7 ERROR
4684 short tbl_trans - tbl_trans # $18-0 fabs norm
4685 short tbl_trans - tbl_trans # $18-1 fabs zero
4686 short tbl_trans - tbl_trans # $18-2 fabs inf
4687 short tbl_trans - tbl_trans # $18-3 fabs qnan
4688 short tbl_trans - tbl_trans # $18-5 fabs denorm
4689 short tbl_trans - tbl_trans # $18-4 fabs snan
4690 short tbl_trans - tbl_trans # $18-6 fabs unnorm
4691 short tbl_trans - tbl_trans # $18-7 ERROR
4693 short scosh - tbl_trans # $19-0 fcosh norm
4694 short ld_pone - tbl_trans # $19-1 fcosh zero
4695 short ld_pinf - tbl_trans # $19-2 fcosh inf
4696 short src_qnan - tbl_trans # $19-3 fcosh qnan
4697 short scoshd - tbl_trans # $19-5 fcosh denorm
4698 short src_snan - tbl_trans # $19-4 fcosh snan
4699 short tbl_trans - tbl_trans # $19-6 fcosh unnorm
4700 short tbl_trans - tbl_trans # $19-7 ERROR
4702 short tbl_trans - tbl_trans # $1a-0 fneg norm
4703 short tbl_trans - tbl_trans # $1a-1 fneg zero
4704 short tbl_trans - tbl_trans # $1a-2 fneg inf
4705 short tbl_trans - tbl_trans # $1a-3 fneg qnan
4706 short tbl_trans - tbl_trans # $1a-5 fneg denorm
4707 short tbl_trans - tbl_trans # $1a-4 fneg snan
4708 short tbl_trans - tbl_trans # $1a-6 fneg unnorm
4709 short tbl_trans - tbl_trans # $1a-7 ERROR
4711 short tbl_trans - tbl_trans # $1b-0 ERROR
4712 short tbl_trans - tbl_trans # $1b-1 ERROR
4713 short tbl_trans - tbl_trans # $1b-2 ERROR
4714 short tbl_trans - tbl_trans # $1b-3 ERROR
4715 short tbl_trans - tbl_trans # $1b-4 ERROR
4716 short tbl_trans - tbl_trans # $1b-5 ERROR
4717 short tbl_trans - tbl_trans # $1b-6 ERROR
4718 short tbl_trans - tbl_trans # $1b-7 ERROR
4720 short sacos - tbl_trans # $1c-0 facos norm
4721 short ld_ppi2 - tbl_trans # $1c-1 facos zero
4722 short t_operr - tbl_trans # $1c-2 facos inf
4723 short src_qnan - tbl_trans # $1c-3 facos qnan
4724 short sacosd - tbl_trans # $1c-5 facos denorm
4725 short src_snan - tbl_trans # $1c-4 facos snan
4726 short tbl_trans - tbl_trans # $1c-6 facos unnorm
4727 short tbl_trans - tbl_trans # $1c-7 ERROR
4729 short scos - tbl_trans # $1d-0 fcos norm
4730 short ld_pone - tbl_trans # $1d-1 fcos zero
4731 short t_operr - tbl_trans # $1d-2 fcos inf
4732 short src_qnan - tbl_trans # $1d-3 fcos qnan
4733 short scosd - tbl_trans # $1d-5 fcos denorm
4734 short src_snan - tbl_trans # $1d-4 fcos snan
4735 short tbl_trans - tbl_trans # $1d-6 fcos unnorm
4736 short tbl_trans - tbl_trans # $1d-7 ERROR
4738 short sgetexp - tbl_trans # $1e-0 fgetexp norm
4739 short src_zero - tbl_trans # $1e-1 fgetexp zero
4740 short t_operr - tbl_trans # $1e-2 fgetexp inf
4741 short src_qnan - tbl_trans # $1e-3 fgetexp qnan
4742 short sgetexpd - tbl_trans # $1e-5 fgetexp denorm
4743 short src_snan - tbl_trans # $1e-4 fgetexp snan
4744 short tbl_trans - tbl_trans # $1e-6 fgetexp unnorm
4745 short tbl_trans - tbl_trans # $1e-7 ERROR
4747 short sgetman - tbl_trans # $1f-0 fgetman norm
4748 short src_zero - tbl_trans # $1f-1 fgetman zero
4749 short t_operr - tbl_trans # $1f-2 fgetman inf
4750 short src_qnan - tbl_trans # $1f-3 fgetman qnan
4751 short sgetmand - tbl_trans # $1f-5 fgetman denorm
4752 short src_snan - tbl_trans # $1f-4 fgetman snan
4753 short tbl_trans - tbl_trans # $1f-6 fgetman unnorm
4754 short tbl_trans - tbl_trans # $1f-7 ERROR
4756 short tbl_trans - tbl_trans # $20-0 fdiv norm
4757 short tbl_trans - tbl_trans # $20-1 fdiv zero
4758 short tbl_trans - tbl_trans # $20-2 fdiv inf
4759 short tbl_trans - tbl_trans # $20-3 fdiv qnan
4760 short tbl_trans - tbl_trans # $20-5 fdiv denorm
4761 short tbl_trans - tbl_trans # $20-4 fdiv snan
4762 short tbl_trans - tbl_trans # $20-6 fdiv unnorm
4763 short tbl_trans - tbl_trans # $20-7 ERROR
4765 short smod_snorm - tbl_trans # $21-0 fmod norm
4766 short smod_szero - tbl_trans # $21-1 fmod zero
4767 short smod_sinf - tbl_trans # $21-2 fmod inf
4768 short sop_sqnan - tbl_trans # $21-3 fmod qnan
4769 short smod_sdnrm - tbl_trans # $21-5 fmod denorm
4770 short sop_ssnan - tbl_trans # $21-4 fmod snan
4771 short tbl_trans - tbl_trans # $21-6 fmod unnorm
4772 short tbl_trans - tbl_trans # $21-7 ERROR
4774 short tbl_trans - tbl_trans # $22-0 fadd norm
4775 short tbl_trans - tbl_trans # $22-1 fadd zero
4776 short tbl_trans - tbl_trans # $22-2 fadd inf
4777 short tbl_trans - tbl_trans # $22-3 fadd qnan
4778 short tbl_trans - tbl_trans # $22-5 fadd denorm
4779 short tbl_trans - tbl_trans # $22-4 fadd snan
4780 short tbl_trans - tbl_trans # $22-6 fadd unnorm
4781 short tbl_trans - tbl_trans # $22-7 ERROR
4783 short tbl_trans - tbl_trans # $23-0 fmul norm
4784 short tbl_trans - tbl_trans # $23-1 fmul zero
4785 short tbl_trans - tbl_trans # $23-2 fmul inf
4786 short tbl_trans - tbl_trans # $23-3 fmul qnan
4787 short tbl_trans - tbl_trans # $23-5 fmul denorm
4788 short tbl_trans - tbl_trans # $23-4 fmul snan
4789 short tbl_trans - tbl_trans # $23-6 fmul unnorm
4790 short tbl_trans - tbl_trans # $23-7 ERROR
4792 short tbl_trans - tbl_trans # $24-0 fsgldiv norm
4793 short tbl_trans - tbl_trans # $24-1 fsgldiv zero
4794 short tbl_trans - tbl_trans # $24-2 fsgldiv inf
4795 short tbl_trans - tbl_trans # $24-3 fsgldiv qnan
4796 short tbl_trans - tbl_trans # $24-5 fsgldiv denorm
4797 short tbl_trans - tbl_trans # $24-4 fsgldiv snan
4798 short tbl_trans - tbl_trans # $24-6 fsgldiv unnorm
4799 short tbl_trans - tbl_trans # $24-7 ERROR
4801 short srem_snorm - tbl_trans # $25-0 frem norm
4802 short srem_szero - tbl_trans # $25-1 frem zero
4803 short srem_sinf - tbl_trans # $25-2 frem inf
4804 short sop_sqnan - tbl_trans # $25-3 frem qnan
4805 short srem_sdnrm - tbl_trans # $25-5 frem denorm
4806 short sop_ssnan - tbl_trans # $25-4 frem snan
4807 short tbl_trans - tbl_trans # $25-6 frem unnorm
4808 short tbl_trans - tbl_trans # $25-7 ERROR
4810 short sscale_snorm - tbl_trans # $26-0 fscale norm
4811 short sscale_szero - tbl_trans # $26-1 fscale zero
4812 short sscale_sinf - tbl_trans # $26-2 fscale inf
4813 short sop_sqnan - tbl_trans # $26-3 fscale qnan
4814 short sscale_sdnrm - tbl_trans # $26-5 fscale denorm
4815 short sop_ssnan - tbl_trans # $26-4 fscale snan
4816 short tbl_trans - tbl_trans # $26-6 fscale unnorm
4817 short tbl_trans - tbl_trans # $26-7 ERROR
4819 short tbl_trans - tbl_trans # $27-0 fsglmul norm
4820 short tbl_trans - tbl_trans # $27-1 fsglmul zero
4821 short tbl_trans - tbl_trans # $27-2 fsglmul inf
4822 short tbl_trans - tbl_trans # $27-3 fsglmul qnan
4823 short tbl_trans - tbl_trans # $27-5 fsglmul denorm
4824 short tbl_trans - tbl_trans # $27-4 fsglmul snan
4825 short tbl_trans - tbl_trans # $27-6 fsglmul unnorm
4826 short tbl_trans - tbl_trans # $27-7 ERROR
4828 short tbl_trans - tbl_trans # $28-0 fsub norm
4829 short tbl_trans - tbl_trans # $28-1 fsub zero
4830 short tbl_trans - tbl_trans # $28-2 fsub inf
4831 short tbl_trans - tbl_trans # $28-3 fsub qnan
4832 short tbl_trans - tbl_trans # $28-5 fsub denorm
4833 short tbl_trans - tbl_trans # $28-4 fsub snan
4834 short tbl_trans - tbl_trans # $28-6 fsub unnorm
4835 short tbl_trans - tbl_trans # $28-7 ERROR
4837 short tbl_trans - tbl_trans # $29-0 ERROR
4838 short tbl_trans - tbl_trans # $29-1 ERROR
4839 short tbl_trans - tbl_trans # $29-2 ERROR
4840 short tbl_trans - tbl_trans # $29-3 ERROR
4841 short tbl_trans - tbl_trans # $29-4 ERROR
4842 short tbl_trans - tbl_trans # $29-5 ERROR
4843 short tbl_trans - tbl_trans # $29-6 ERROR
4844 short tbl_trans - tbl_trans # $29-7 ERROR
4846 short tbl_trans - tbl_trans # $2a-0 ERROR
4847 short tbl_trans - tbl_trans # $2a-1 ERROR
4848 short tbl_trans - tbl_trans # $2a-2 ERROR
4849 short tbl_trans - tbl_trans # $2a-3 ERROR
4850 short tbl_trans - tbl_trans # $2a-4 ERROR
4851 short tbl_trans - tbl_trans # $2a-5 ERROR
4852 short tbl_trans - tbl_trans # $2a-6 ERROR
4853 short tbl_trans - tbl_trans # $2a-7 ERROR
4855 short tbl_trans - tbl_trans # $2b-0 ERROR
4856 short tbl_trans - tbl_trans # $2b-1 ERROR
4857 short tbl_trans - tbl_trans # $2b-2 ERROR
4858 short tbl_trans - tbl_trans # $2b-3 ERROR
4859 short tbl_trans - tbl_trans # $2b-4 ERROR
4860 short tbl_trans - tbl_trans # $2b-5 ERROR
4861 short tbl_trans - tbl_trans # $2b-6 ERROR
4862 short tbl_trans - tbl_trans # $2b-7 ERROR
4864 short tbl_trans - tbl_trans # $2c-0 ERROR
4865 short tbl_trans - tbl_trans # $2c-1 ERROR
4866 short tbl_trans - tbl_trans # $2c-2 ERROR
4867 short tbl_trans - tbl_trans # $2c-3 ERROR
4868 short tbl_trans - tbl_trans # $2c-4 ERROR
4869 short tbl_trans - tbl_trans # $2c-5 ERROR
4870 short tbl_trans - tbl_trans # $2c-6 ERROR
4871 short tbl_trans - tbl_trans # $2c-7 ERROR
4873 short tbl_trans - tbl_trans # $2d-0 ERROR
4874 short tbl_trans - tbl_trans # $2d-1 ERROR
4875 short tbl_trans - tbl_trans # $2d-2 ERROR
4876 short tbl_trans - tbl_trans # $2d-3 ERROR
4877 short tbl_trans - tbl_trans # $2d-4 ERROR
4878 short tbl_trans - tbl_trans # $2d-5 ERROR
4879 short tbl_trans - tbl_trans # $2d-6 ERROR
4880 short tbl_trans - tbl_trans # $2d-7 ERROR
4882 short tbl_trans - tbl_trans # $2e-0 ERROR
4883 short tbl_trans - tbl_trans # $2e-1 ERROR
4884 short tbl_trans - tbl_trans # $2e-2 ERROR
4885 short tbl_trans - tbl_trans # $2e-3 ERROR
4886 short tbl_trans - tbl_trans # $2e-4 ERROR
4887 short tbl_trans - tbl_trans # $2e-5 ERROR
4888 short tbl_trans - tbl_trans # $2e-6 ERROR
4889 short tbl_trans - tbl_trans # $2e-7 ERROR
4891 short tbl_trans - tbl_trans # $2f-0 ERROR
4892 short tbl_trans - tbl_trans # $2f-1 ERROR
4893 short tbl_trans - tbl_trans # $2f-2 ERROR
4894 short tbl_trans - tbl_trans # $2f-3 ERROR
4895 short tbl_trans - tbl_trans # $2f-4 ERROR
4896 short tbl_trans - tbl_trans # $2f-5 ERROR
4897 short tbl_trans - tbl_trans # $2f-6 ERROR
4898 short tbl_trans - tbl_trans # $2f-7 ERROR
4900 short ssincos - tbl_trans # $30-0 fsincos norm
4901 short ssincosz - tbl_trans # $30-1 fsincos zero
4902 short ssincosi - tbl_trans # $30-2 fsincos inf
4903 short ssincosqnan - tbl_trans # $30-3 fsincos qnan
4904 short ssincosd - tbl_trans # $30-5 fsincos denorm
4905 short ssincossnan - tbl_trans # $30-4 fsincos snan
4906 short tbl_trans - tbl_trans # $30-6 fsincos unnorm
4907 short tbl_trans - tbl_trans # $30-7 ERROR
4909 short ssincos - tbl_trans # $31-0 fsincos norm
4910 short ssincosz - tbl_trans # $31-1 fsincos zero
4911 short ssincosi - tbl_trans # $31-2 fsincos inf
4912 short ssincosqnan - tbl_trans # $31-3 fsincos qnan
4913 short ssincosd - tbl_trans # $31-5 fsincos denorm
4914 short ssincossnan - tbl_trans # $31-4 fsincos snan
4915 short tbl_trans - tbl_trans # $31-6 fsincos unnorm
4916 short tbl_trans - tbl_trans # $31-7 ERROR
4918 short ssincos - tbl_trans # $32-0 fsincos norm
4919 short ssincosz - tbl_trans # $32-1 fsincos zero
4920 short ssincosi - tbl_trans # $32-2 fsincos inf
4921 short ssincosqnan - tbl_trans # $32-3 fsincos qnan
4922 short ssincosd - tbl_trans # $32-5 fsincos denorm
4923 short ssincossnan - tbl_trans # $32-4 fsincos snan
4924 short tbl_trans - tbl_trans # $32-6 fsincos unnorm
4925 short tbl_trans - tbl_trans # $32-7 ERROR
4927 short ssincos - tbl_trans # $33-0 fsincos norm
4928 short ssincosz - tbl_trans # $33-1 fsincos zero
4929 short ssincosi - tbl_trans # $33-2 fsincos inf
4930 short ssincosqnan - tbl_trans # $33-3 fsincos qnan
4931 short ssincosd - tbl_trans # $33-5 fsincos denorm
4932 short ssincossnan - tbl_trans # $33-4 fsincos snan
4933 short tbl_trans - tbl_trans # $33-6 fsincos unnorm
4934 short tbl_trans - tbl_trans # $33-7 ERROR
4936 short ssincos - tbl_trans # $34-0 fsincos norm
4937 short ssincosz - tbl_trans # $34-1 fsincos zero
4938 short ssincosi - tbl_trans # $34-2 fsincos inf
4939 short ssincosqnan - tbl_trans # $34-3 fsincos qnan
4940 short ssincosd - tbl_trans # $34-5 fsincos denorm
4941 short ssincossnan - tbl_trans # $34-4 fsincos snan
4942 short tbl_trans - tbl_trans # $34-6 fsincos unnorm
4943 short tbl_trans - tbl_trans # $34-7 ERROR
4945 short ssincos - tbl_trans # $35-0 fsincos norm
4946 short ssincosz - tbl_trans # $35-1 fsincos zero
4947 short ssincosi - tbl_trans # $35-2 fsincos inf
4948 short ssincosqnan - tbl_trans # $35-3 fsincos qnan
4949 short ssincosd - tbl_trans # $35-5 fsincos denorm
4950 short ssincossnan - tbl_trans # $35-4 fsincos snan
4951 short tbl_trans - tbl_trans # $35-6 fsincos unnorm
4952 short tbl_trans - tbl_trans # $35-7 ERROR
4954 short ssincos - tbl_trans # $36-0 fsincos norm
4955 short ssincosz - tbl_trans # $36-1 fsincos zero
4956 short ssincosi - tbl_trans # $36-2 fsincos inf
4957 short ssincosqnan - tbl_trans # $36-3 fsincos qnan
4958 short ssincosd - tbl_trans # $36-5 fsincos denorm
4959 short ssincossnan - tbl_trans # $36-4 fsincos snan
4960 short tbl_trans - tbl_trans # $36-6 fsincos unnorm
4961 short tbl_trans - tbl_trans # $36-7 ERROR
4963 short ssincos - tbl_trans # $37-0 fsincos norm
4964 short ssincosz - tbl_trans # $37-1 fsincos zero
4965 short ssincosi - tbl_trans # $37-2 fsincos inf
4966 short ssincosqnan - tbl_trans # $37-3 fsincos qnan
4967 short ssincosd - tbl_trans # $37-5 fsincos denorm
4968 short ssincossnan - tbl_trans # $37-4 fsincos snan
4969 short tbl_trans - tbl_trans # $37-6 fsincos unnorm
4970 short tbl_trans - tbl_trans # $37-7 ERROR
4978 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
4980 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
4986 mov.l (%sp),-(%sp) # store SR,hi(PC)
5029 # 2. If |X| >= 15Pi or |X| < 2**(-40), go to 7. #
5037 # 5. (k is odd) Set j := (k-1)/2, sgn := (-1)**j. #
5043 # 6. (k is even) Set j := k/2, sgn := (-1)**j. Return sgn*sin(r) #
5050 # 8. (|X|<2**(-40)) If SIN is invoked, return X; #
5057 # 1. If |X| >= 15Pi or |X| < 2**(-40), go to 6. #
5064 # 4. (k is odd) Set j1 := (k-1)/2, j2 := j1 (EOR) (k mod 2), ie. #
5066 # sgn1 := (-1)**j1, sgn2 := (-1)**j2. #
5071 # 5. (k is even) Set j1 := k/2, sgn1 := (-1)**j1. #
5078 # 7. (|X|<2**(-40)) SIN(X) = X and COS(X) = 1. Exit. #
5132 #--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE
5142 cmpi.l %d1,&0x3FD78000 # is |X| >= 2**(-40)?
5143 bge.b SOK1 # no
5148 blt.b SINMAIN # no
5151 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5152 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5157 lea PITBL+0x200(%pc),%a1 # TABLE OF N*PI/2, N = -32,...,32
5167 fsub.x (%a1)+,%fp0 # X-Y1
5168 fsub.s (%a1),%fp0 # fp0 = R = (X-Y1)-Y2
5171 #--continuation from REDUCEX
5173 #--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
5180 #--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
5181 #--THEN WE RETURN SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
5182 #--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE
5183 #--R' = SGN*R, S=R*R. THIS CAN BE REWRITTEN AS
5184 #--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
5185 #--WHERE T=S*S.
5186 #--NOTE THAT A3 THROUGH A7 ARE STORED IN DOUBLE PRECISION
5187 #--WHILE A1 AND A2 ARE IN DOUBLE-EXTENDED FORMAT.
5189 fmovm.x &0x0c,-(%sp) # save fp2/fp3
5225 fmul.x %fp1,%fp0 # SIN(R')-R'
5230 fadd.x X(%a6),%fp0 # last inst - possible exception set
5233 #--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
5234 #--THEN WE RETURN SGN*COS(R). SGN*COS(R) IS COMPUTED BY
5235 #--SGN + S'*(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE
5236 #--S=R*R AND S'=SGN*S. THIS CAN BE REWRITTEN AS
5237 #--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))])
5238 #--WHERE T=S*S.
5239 #--NOTE THAT B4 THROUGH B8 ARE STORED IN DOUBLE PRECISION
5240 #--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2
5241 #--AND IS THEREFORE STORED AS SINGLE PRECISION.
5243 fmovm.x &0x0c,-(%sp) # save fp2/fp3
5292 fadd.s POSNEG1(%a6),%fp0 # last inst - possible exception set
5298 #--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
5299 #--IF |X| < 2**(-40), RETURN X OR 1.
5316 fmov.x X(%a6),%fp0 # last inst - possible exception set
5322 fadd.s &0x80800000,%fp0 # last inst - possible exception set
5327 #--SIN(X) = X FOR DENORMALIZED X
5333 #--COS(X) = 1 FOR DENORMALIZED X
5342 #--SET ADJN TO 4
5352 cmp.l %d1,&0x3FD78000 # |X| >= 2**(-40)?
5362 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5363 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5369 lea PITBL+0x200(%pc),%a1 # TABLE OF N*PI/2, N = -32,...,32
5377 fsub.x (%a1)+,%fp0 # X-Y1
5378 fsub.s (%a1),%fp0 # FP0 IS R = (X-Y1)-Y2
5381 #--continuation point from REDUCEX
5389 #--REGISTERS SAVED SO FAR: D0, A0, FP2.
5390 fmovm.x &0x04,-(%sp) # save fp2
5399 mov.l %d2,-(%sp)
5463 #--REGISTERS SAVED SO FAR: FP2.
5464 fmovm.x &0x04,-(%sp) # save fp2
5558 #--SIN AND COS OF X FOR DENORMALIZED X
5560 mov.l %d0,-(%sp) # save d0
5568 #--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
5569 #--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
5570 #--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
5572 fmovm.x &0x3c,-(%sp) # save {fp2-fp5}
5573 mov.l %d2,-(%sp) # save d2
5576 #--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
5577 #--there is a danger of unwanted overflow in first LOOP iteration. In this
5578 #--case, reduce argument by one remainder step to make subsequent reduction
5579 #--safe.
5581 bne.b SLOOP # no
5599 fadd.x FP_SCR0(%a6),%fp0 # high part of reduction is exact
5600 fmov.x %fp0,%fp1 # save high result in fp1
5605 #--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
5606 #--integer quotient will be stored in N
5607 #--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
5609 fmov.x %fp0,INARG(%a6) # +-2**K * F, 1 <= F < 2
5617 sub.l &27,%d1 # d0 = L := K-27
5625 #--FIND THE REMAINDER OF (R,r) W.R.T. 2**L * (PI/2). L IS SO CHOSEN
5626 #--THAT INT( X * (2/PI) / 2**(L) ) < 2**29.
5628 #--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
5629 #--2**L * (PIby2_1), 2**L * (PIby2_2)
5632 sub.l %d1,%d2 # BIASED EXP OF 2**(-L)*(2/PI)
5636 mov.w %d2,FP_SCR0_EX(%a6) # FP_SCR0 = 2**(-L)*(2/PI)
5639 fmul.x FP_SCR0(%a6),%fp2 # fp2 = X * 2**(-L)*(2/PI)
5641 #--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
5642 #--FLOATING POINT FORMAT, THE TWO FMOVE'S FMOVE.L FP <--> N
5643 #--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
5644 #--(SIGN(INARG)*2**63 + FP2) - SIGN(INARG)*2**63 WILL GIVE
5645 #--US THE DESIRED VALUE IN FLOATING POINT.
5655 #--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
5670 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
5671 #--P2 = 2**(L) * Piby2_2
5678 #--we want P+p = W+w but |p| <= half ulp of P
5679 #--Then, we need to compute A := R-P and a := r-p
5681 fsub.x %fp3,%fp4 # fp4 = W-P
5683 fsub.x %fp3,%fp0 # fp0 = A := R - P
5684 fadd.x %fp5,%fp4 # fp4 = p = (W-P)+w
5687 fsub.x %fp4,%fp1 # fp1 = a := r - p
5689 #--Now we need to normalize (A,a) to "new (R,r)" where R+r = A+a but
5690 #--|r| <= half ulp of R.
5692 #--No need to calculate r if this is the last loop
5696 #--Need to calculate r
5697 fsub.x %fp0,%fp3 # fp3 = A-R
5698 fadd.x %fp3,%fp1 # fp1 = r := (A-R)+a
5704 fmovm.x (%sp)+,&0x3c # restore {fp2-fp5}
5731 # 1. If |X| >= 15Pi or |X| < 2**(-40), go to 6. #
5744 # 4. (k is odd) Tan(X) = -cot(r). Since tan(r) is approximated by #
5748 # -Cot(r) = -V/U. Exit. #
5752 # 7. (|X|<2**(-40)) Tan(X) = X. Exit. #
5787 #--N*PI/2, -32 <= N <= 32, IN A LEADING TERM IN EXT. AND TRAILING
5788 #--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
5789 #--MOST 69 BITS LONG.
5872 cmp.l %d1,&0x3FD78000 # |X| >= 2**(-40)?
5881 #--THIS IS THE USUAL CASE, |X| <= 15 PI.
5882 #--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
5886 lea.l PITBL+0x200(%pc),%a1 # TABLE OF N*PI/2, N = -32,...,32
5893 fsub.x (%a1)+,%fp0 # X-Y1
5895 fsub.s (%a1),%fp0 # FP0 IS R = (X-Y1)-Y2
5901 fmovm.x &0x0c,-(%sp) # save fp2,fp3
5939 fdiv.x %fp1,%fp0 # last inst - possible exception set
5974 fmov.x %fp1,-(%sp)
5978 fdiv.x (%sp)+,%fp0 # last inst - possible exception set
5982 #--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
5983 #--IF |X| < 2**(-40), RETURN X OR 1.
5988 fmov.x %fp0,-(%sp)
5991 fmov.x (%sp)+,%fp0 # last inst - posibble exception set
5995 #--TAN(X) = X FOR DENORMALIZED X
5999 #--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
6000 #--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
6001 #--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
6003 fmovm.x &0x3c,-(%sp) # save {fp2-fp5}
6004 mov.l %d2,-(%sp) # save d2
6007 #--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
6008 #--there is a danger of unwanted overflow in first LOOP iteration. In this
6009 #--case, reduce argument by one remainder step to make subsequent reduction
6010 #--safe.
6012 bne.b LOOP # no
6030 fadd.x FP_SCR0(%a6),%fp0 # high part of reduction is exact
6031 fmov.x %fp0,%fp1 # save high result in fp1
6036 #--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
6037 #--integer quotient will be stored in N
6038 #--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
6040 fmov.x %fp0,INARG(%a6) # +-2**K * F, 1 <= F < 2
6048 sub.l &27,%d1 # d0 = L := K-27
6056 #--FIND THE REMAINDER OF (R,r) W.R.T. 2**L * (PI/2). L IS SO CHOSEN
6057 #--THAT INT( X * (2/PI) / 2**(L) ) < 2**29.
6059 #--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
6060 #--2**L * (PIby2_1), 2**L * (PIby2_2)
6063 sub.l %d1,%d2 # BIASED EXP OF 2**(-L)*(2/PI)
6067 mov.w %d2,FP_SCR0_EX(%a6) # FP_SCR0 = 2**(-L)*(2/PI)
6070 fmul.x FP_SCR0(%a6),%fp2 # fp2 = X * 2**(-L)*(2/PI)
6072 #--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
6073 #--FLOATING POINT FORMAT, THE TWO FMOVE'S FMOVE.L FP <--> N
6074 #--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
6075 #--(SIGN(INARG)*2**63 + FP2) - SIGN(INARG)*2**63 WILL GIVE
6076 #--US THE DESIRED VALUE IN FLOATING POINT.
6086 #--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
6101 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
6102 #--P2 = 2**(L) * Piby2_2
6109 #--we want P+p = W+w but |p| <= half ulp of P
6110 #--Then, we need to compute A := R-P and a := r-p
6112 fsub.x %fp3,%fp4 # fp4 = W-P
6114 fsub.x %fp3,%fp0 # fp0 = A := R - P
6115 fadd.x %fp5,%fp4 # fp4 = p = (W-P)+w
6118 fsub.x %fp4,%fp1 # fp1 = a := r - p
6120 #--Now we need to normalize (A,a) to "new (R,r)" where R+r = A+a but
6121 #--|r| <= half ulp of R.
6123 #--No need to calculate r if this is the last loop
6127 #--Need to calculate r
6128 fsub.x %fp0,%fp3 # fp3 = A-R
6129 fadd.x %fp3,%fp1 # fp1 = r := (A-R)+a
6135 fmovm.x (%sp)+,&0x3c # restore {fp2-fp5}
6163 # Note that k = -4, -3,..., or 3. #
6165 # significant bits of X with a bit-1 attached at the 6-th #
6166 # bit position. Define u to be u = (X-F) / (1 + X*F). #
6177 # Step 7. Define X' = -1/X. Approximate arctan(X') by an odd #
6346 #--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
6364 #--THE MOST LIKELY CASE, |X| IN [1/16, 16). WE USE TABLE TECHNIQUE
6365 #--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
6366 #--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
6367 #--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
6368 #--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
6369 #--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
6370 #--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
6371 #--FETCH F AND SAVING OF REGISTERS CAN BE ALL HIDED UNDER THE
6372 #--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
6373 #--ONE. NOTE ALSO THAT THE TRADITIONAL SCHEME THAT APPROXIMATE
6374 #--ATAN(X) DIRECTLY WILL NEED TO USE A RATIONAL APPROXIMATION
6375 #--(DIVISION NEEDED) ANYWAY BECAUSE A POLYNOMIAL APPROXIMATION
6376 #--WILL INVOLVE A VERY LONG POLYNOMIAL.
6378 #--NOW WE SEE X AS +-2^K * 1.BBBBBBB....B <- 1. + 63 BITS
6379 #--WE CHOSE F TO BE +-2^K * 1.BBBB1
6380 #--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
6381 #--SIXTH BITS IS SET TO BE 1. SINCE K = -4, -3, ..., 3, THERE
6382 #--ARE ONLY 8 TIMES 16 = 2^7 = 128 |F|'S. SINCE ATAN(-|F|) IS
6383 #-- -ATAN(|F|), WE NEED TO STORE ONLY ATAN(|F|).
6388 or.l &0x04000000,XFRAC(%a6) # SET 6-TH BIT TO 1
6393 fsub.x X(%a6),%fp0 # FP0 IS X-F
6395 fdiv.x %fp1,%fp0 # FP0 IS U = (X-F)/(1+X*F)
6397 #--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
6398 #--CREATE ATAN(F) AND STORE IT IN ATANF, AND
6399 #--SAVE REGISTERS FP2.
6401 mov.l %d2,-(%sp) # SAVE d2 TEMPORARILY
6419 #--THAT'S ALL I HAVE TO DO FOR NOW,
6420 #--BUT ALAS, THE DIVIDE IS STILL CRANKING!
6422 #--U IN FP0, WE ARE NOW READY TO COMPUTE ATAN(U) AS
6423 #--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
6424 #--THE POLYNOMIAL MAY LOOK STRANGE, BUT IS NEVERTHELESS CORRECT.
6425 #--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
6426 #--WHAT WE HAVE HERE IS MERELY A1 = A3, A2 = A1/A3, A3 = A2/A3.
6427 #--THE REASON FOR THIS REARRANGEMENT IS TO MAKE THE INDEPENDENT
6428 #--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
6430 fmovm.x &0x04,-(%sp) # save fp2
6450 #--|X| IS IN d0 IN COMPACT FORM. FP1, d0 SAVED.
6451 #--FP0 IS X AND |X| <= 1/16 OR |X| >= 16.
6456 #--|X| <= 1/16
6457 #--IF |X| < 2^(-40), RETURN X AS ANSWER. OTHERWISE, APPROXIMATE
6458 #--ATAN(X) BY X + X*Y*(B1+Y*(B2+Y*(B3+Y*(B4+Y*(B5+Y*B6)))))
6459 #--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )
6460 #--WHERE Y = X*X, AND Z = Y*Y.
6465 #--COMPUTE POLYNOMIAL
6466 fmovm.x &0x0c,-(%sp) # save fp2/fp3
6471 fmul.x %fp1,%fp1 # FP1 IS Z = Y*Y
6476 fmul.x %fp1,%fp2 # Z*B6
6477 fmul.x %fp1,%fp3 # Z*B5
6479 fadd.d ATANB4(%pc),%fp2 # B4+Z*B6
6480 fadd.d ATANB3(%pc),%fp3 # B3+Z*B5
6482 fmul.x %fp1,%fp2 # Z*(B4+Z*B6)
6483 fmul.x %fp3,%fp1 # Z*(B3+Z*B5)
6485 fadd.d ATANB2(%pc),%fp2 # B2+Z*(B4+Z*B6)
6486 fadd.d ATANB1(%pc),%fp1 # B1+Z*(B3+Z*B5)
6488 fmul.x %fp0,%fp2 # Y*(B2+Z*(B4+Z*B6))
6491 fadd.x %fp2,%fp1 # [B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))]
6493 fmul.x %fp1,%fp0 # X*Y*([B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))])
6502 #--|X| < 2^(-40), ATAN(X) = X
6506 fmov.x X(%a6),%fp0 # last inst - possible exception set
6511 #--IF |X| > 2^(100), RETURN SIGN(X)*(PI/2 - TINY). OTHERWISE,
6512 #--RETURN SIGN(X)*PI/2 + ATAN(-1/X).
6516 #--APPROXIMATE ATAN(-1/X) BY
6517 #--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
6518 #--THIS CAN BE RE-WRITTEN AS
6519 #--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.
6521 fmovm.x &0x0c,-(%sp) # save fp2/fp3
6523 fmov.s &0xBF800000,%fp1 # LOAD -1
6524 fdiv.x %fp0,%fp1 # FP1 IS -1/X
6526 #--DIVIDE IS STILL CRANKING
6533 fmul.x %fp1,%fp1 # FP1 IS Z = Y*Y
6538 fmul.x %fp1,%fp3 # Z*C5
6539 fmul.x %fp1,%fp2 # Z*B4
6541 fadd.d ATANC3(%pc),%fp3 # C3+Z*C5
6542 fadd.d ATANC2(%pc),%fp2 # C2+Z*C4
6544 fmul.x %fp3,%fp1 # Z*(C3+Z*C5), FP3 RELEASED
6545 fmul.x %fp0,%fp2 # Y*(C2+Z*C4)
6547 fadd.d ATANC1(%pc),%fp1 # C1+Z*(C3+Z*C5)
6550 fadd.x %fp2,%fp1 # [Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
6552 fmul.x %fp1,%fp0 # X'*Y*([B1+Z*(B3+Z*B5)]
6553 # ... +[Y*(B2+Z*(B4+Z*B6))])
6571 #--RETURN SIGN(X)*(PIBY2 - TINY) = SIGN(X)*PIBY2 - SIGN(X)*TINY
6588 #--ENTRY POINT FOR ATAN(X) FOR DENORMALIZED ARGUMENT
6615 # z := sqrt( [1-X][1+X] ) #
6616 # asin(X) = atan( x / z ). #
6646 #--THIS IS THE USUAL CASE, |X| < 1
6647 #--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )
6651 fsub.x %fp0,%fp1 # 1-X
6652 fmovm.x &0x4,-(%sp) # {fp2}
6655 fmul.x %fp2,%fp1 # (1+X)(1-X)
6657 fsqrt.x %fp1 # SQRT([1-X][1+X])
6658 fdiv.x %fp1,%fp0 # X/SQRT([1-X][1+X])
6659 fmovm.x &0x01,-(%sp) # save X/SQRT(...)
6670 #--|X| = 1, ASIN(X) = +- PI/2.
6675 or.l &0x3F800000,%d1 # +-1 IN SGL FORMAT
6676 mov.l %d1,-(%sp) # push SIGN(X) IN SGL-FMT
6681 #--|X| < 2^(-40), ATAN(X) = X
6685 fmov.x (%a0),%fp0 # last inst - possible exception
6689 #--ASIN(X) = X FOR DENORMALIZED X
6716 # z := (1-X) / (1+X) #
6717 # acos(X) = 2 * atan( sqrt(z) ). #
6739 #--THIS IS THE USUAL CASE, |X| < 1
6740 #--ACOS(X) = 2 * ATAN( SQRT( (1-X)/(1+X) ) )
6745 fneg.x %fp0 # -X
6746 fadd.s &0x3F800000,%fp0 # 1-X
6747 fdiv.x %fp1,%fp0 # (1-X)/(1+X)
6748 fsqrt.x %fp0 # SQRT((1-X)/(1+X))
6749 mov.l %d0,-(%sp) # save original users fpcr
6751 fmovm.x &0x01,-(%sp) # save SQRT(...) to stack
6753 bsr satan # ATAN(SQRT([1-X]/[1+X]))
6765 #--|X| = 1, ACOS(X) = 0 OR PI
6769 #--X = -1
6781 #--ACOS(X) = PI/2 FOR DENORMALIZED X
6798 # fp0 = exp(X) or exp(X)-1 #
6809 # ------ #
6812 # Step 2. Return ans := ans + sign(X)*2^(-126). Exit. #
6813 # Notes: This will always generate one exception -- inexact. #
6817 # ----- #
6820 # 1.1 If |X| >= 2^(-65), go to Step 1.3. #
6824 # Notes: The usual case should take the branches 1.1 -> 1.3 -> 2.#
6825 # To avoid the use of floating-point comparisons, a #
6827 # 32-bit integer, the upper (more significant) 16 bits #
6835 # |X| < 16380 log(2). There is no harm to have a small #
6839 # Step 2. Calculate N = round-to-nearest-int( X * 64/log2 ). #
6840 # 2.1 Set AdjFlag := 0 (indicates the branch 1.3 -> 2 #
6842 # 2.2 N := round-to-nearest-integer( X * 64/log2 ). #
6845 # 2.4 Calculate M = (N - J)/64; so N = 64M + J. #
6850 # Z := X * constant #
6851 # N := round-to-nearest-integer(Z) #
6853 # constant := single-precision( 64/log 2 ). #
6855 # Using a single-precision constant avoids memory #
6856 # access. Another effect of using a single-precision #
6857 # "constant" is that the calculated value Z is #
6859 # Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24). #
6863 # Step 3. Calculate X - N*log2/64. #
6865 # where L1 := single-precision(-log2/64). #
6867 # L2 := extended-precision(-log2/64 - L1).#
6869 # approximate the value -log2/64 to 88 bits of accuracy. #
6870 # b) N*L1 is exact because N is no longer than 22 bits #
6871 # and L1 is no longer than 24 bits. #
6878 # N = rnd-to-int( X*64/log2 (1+eps) ), |eps|<=2^(-24) #
6880 # X*64/log2 - N = f - eps*X 64/log2 #
6881 # X - N*log2/64 = f*log2/64 - eps*X #
6886 # |X - N*log2/64| <= (0.5 + 16446/2^(18))*log2/64 #
6890 # Step 4. Approximate exp(R)-1 by a polynomial #
6897 # |p - (exp(R)-1)| < 2^(-68.8) for all |R| <= 0.0062. #
6912 # zero. The reason for such a special form is that T-1, #
6913 # T-2, and T-8 will all be exact --- a property that will #
6941 # Notes: For non-zero X, the inexact exception will always be #
6952 # (mimic 2.2 - 2.6) #
6953 # 8.2 N := round-to-integer( X * 64/log2 ) #
6955 # 8.4 K := (N-J)/64, M1 := truncate(K/2), M = K-M1, #
6961 # Notes: Refer to notes for 2.2 - 2.6. #
6971 # extended-precision numbers whose square over/underflow #
6976 # -------- #
6985 # ------- #
6992 # Notes: The usual case should take the branches 1.1 -> 1.3 -> 2.#
6994 # because EXPM1 is intended to evaluate exp(X)-1 #
6998 # Step 2. Calculate N = round-to-nearest-int( X * 64/log2 ). #
6999 # 2.1 N := round-to-nearest-integer( X * 64/log2 ). #
7002 # 2.3 Calculate M = (N - J)/64; so N = 64M + J. #
7006 # OnebySc := -2^(-M). #
7009 # Step 3. Calculate X - N*log2/64. #
7011 # where L1 := single-precision(-log2/64). #
7013 # L2 := extended-precision(-log2/64 - L1).#
7018 # Step 4. Approximate exp(R)-1 by a polynomial #
7025 # |p - (exp(R)-1)| < |R| * 2^(-72.7) #
7040 # zero. The reason for such a special form is that T-1, #
7041 # T-2, and T-8 will all be exact --- a property that will #
7043 # in p is no bigger than 2^(-67.7) compared to the final #
7046 # Step 6. Reconstruction of exp(X)-1 #
7047 # exp(X)-1 = 2^M * ( 2^(J/64) + p - 2^(-M) ). #
7050 # 6.3 If M >= -3, go to 6.5. #
7058 # Step 7. exp(X)-1 for |X| < 1/4. #
7059 # 7.1 If |X| >= 2^(-65), go to Step 9. #
7062 # Step 8. Calculate exp(X)-1, |X| < 2^(-65). #
7063 # 8.1 If |X| < 2^(-16312), goto 8.3 #
7064 # 8.2 Restore FPCR; return ans := X - 2^(-16382). #
7067 # 8.4 Restore FPCR; ans := ans - 2^(-16382). #
7069 # Notes: The idea is to return "X - tiny" under the user #
7072 # the best we can. For |X| >= 2^(-16312), the #
7076 # Step 9. Calculate exp(X)-1, |X| < 1/4, by a polynomial #
7083 # |p - (exp(X)-1)| < |X| 2^(-70.6) #
7095 # Step 10. Calculate exp(X)-1 for |X| >= 70 log 2. #
7096 # 10.1 If X >= 70log2 , exp(X) - 1 = exp(X) for all #
7098 # 10.2 If X <= -70log2, exp(X) - 1 = -1 for all practical #
7100 # ans := -1 #
7102 # Return ans := ans + 2^(-126). Exit. #
7103 # Notes: 10.2 will always create an inexact and return -1 + tiny #
7208 #--entry point for EXP(X), here X is finite, non-zero, and not NaN's
7210 #--Step 1.
7213 cmp.l %d1,&0x3FBE0000 # 2^(-65)
7218 #--The case |X| >= 2^(-65)
7225 #--Step 2.
7226 #--This is the normal branch: 2^(-65) <= |X| < 16380 log2.
7231 fmovm.x &0xc,-(%sp) # save fp2 {%fp2/%fp3}
7235 fmov.l %d1,%fp0 # convert to floating-format
7244 mov.w L2(%pc),L_SCR1(%a6) # prefetch L2, no need in CB
7247 #--Step 3.
7248 #--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
7249 #--a0 points to 2^(J/64), D0 is biased expo. of 2^(M)
7251 fmul.s &0xBC317218,%fp0 # N * L1, L1 = lead(-log2/64)
7252 fmul.x L2(%pc),%fp2 # N * L2, L1+L2 = -log2/64
7256 #--Step 4.
7257 #--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
7258 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
7259 #--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
7260 #--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]
7288 fadd.x %fp2,%fp0 # fp0 is EXP(R) - 1
7290 #--Step 5
7291 #--final reconstruction process
7292 #--EXP(X) = 2^M * ( 2^(J/64) + 2^(J/64)*(EXP(R)-1) )
7294 fmul.x %fp1,%fp0 # 2^(J/64)*(Exp(R)-1)
7301 #--Step 6
7313 #--Step 7
7320 #--Step 8
7323 #--Steps 8.2 -- 8.6
7328 fmovm.x &0xc,-(%sp) # save fp2 {%fp2/%fp3}
7332 fmov.l %d1,%fp0 # convert to floating-format
7351 #--Step 9
7358 #--entry point for EXP(X), X is denormalized
7359 mov.l (%a0),-(%sp)
7361 ori.l &0x00800000,(%sp) # sign(X)*2^(-126)
7371 #--entry point for EXPM1(X), here X is finite, non-zero, non-NaN
7373 #--Step 1.
7374 #--Step 1.1
7382 #--Step 1.3
7383 #--The case |X| >= 1/4
7390 #--Step 2.
7391 #--This is the case: 1/4 <= |X| <= 70 log2.
7396 fmovm.x &0xc,-(%sp) # save fp2 {%fp2/%fp3}
7399 fmov.l %d1,%fp0 # convert to floating-format
7409 #--Step 3.
7410 #--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
7411 #--a0 points to 2^(J/64), D0 and a1 both contain M
7413 fmul.s &0xBC317218,%fp0 # N * L1, L1 = lead(-log2/64)
7414 fmul.x L2(%pc),%fp2 # N * L2, L1+L2 = -log2/64
7419 #--Step 4.
7420 #--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
7421 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6)))))
7422 #--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
7423 #--[R*S*(A2+S*(A4+S*A6))] + [R+S*(A1+S*(A3+S*A5))]
7442 neg.w %d1 # D0 is -M
7444 add.w &0x3FFF,%d1 # biased expo. of 2^(-M)
7449 or.w &0x8000,%d1 # signed/expo. of -2^(-M)
7450 mov.w %d1,ONEBYSC(%a6) # OnebySc is -2^(-M)
7458 fadd.x %fp2,%fp0 # fp0 IS EXP(R)-1
7462 #--Step 5
7463 #--Compute 2^(J/64)*p
7465 fmul.x (%a1),%fp0 # 2^(J/64)*(Exp(R)-1)
7467 #--Step 6
7468 #--Step 6.1
7472 #--Step 6.2 M >= 64
7479 #--Step 6.3 M <= 63
7480 cmp.l %d1,&-3
7483 #--Step 6.4 M <= -4
7489 #--Step 6.5 -3 <= M <= 63
7496 #--Step 6.6
7502 #--Step 7 |X| < 1/4.
7503 cmp.l %d1,&0x3FBE0000 # 2^(-65)
7507 #--Step 8 |X| < 2^(-65)
7508 cmp.l %d1,&0x00330000 # 2^(-16312)
7510 #--Step 8.2
7511 mov.l &0x80010000,SC(%a6) # SC is -2^(-16382)
7521 #--Step 8.3
7534 #--Step 9 exp(X)-1 by a simple polynomial
7537 fmovm.x &0xc,-(%sp) # save fp2 {%fp2/%fp3}
7585 #--Step 10 |X| > 70 log2
7589 #--Step 10.2
7590 fmov.s &0xBF800000,%fp0 # fp0 is -1
7592 fadd.s &0x00800000,%fp0 # -1 + 2^(-126)
7597 #--entry point for EXPM1(X), here X is denormalized
7598 #--Step 0.
7610 # the result is [1.0 - 2.0). #
7637 neg.w %d0 # new exp = -(shft amt)
7647 bclr &0xe,%d0 # make it the new exp +-3fff
7662 # For denormalized numbers, shift the mantissa until the j-bit = 1,
7693 # y = |X|, z = exp(Y), and #
7694 # cosh(X) = (1/2)*( z + 1/z ). #
7705 # Y' := Y - 16381 log2 #
7729 #--THIS IS THE USUAL CASE, |X| < 16380 LOG2
7730 #--COSH(X) = (1/2) * ( EXP(X) + 1/EXP(X) )
7734 mov.l %d0,-(%sp)
7736 fmovm.x &0x01,-(%sp) # save |X| to stack
7756 fsub.d T1(%pc),%fp0 # (|X|-16381LOG2_LEAD)
7757 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE
7759 mov.l %d0,-(%sp)
7761 fmovm.x &0x01,-(%sp) # save fp0 to stack
7776 #--COSH(X) = 1 FOR DENORMALIZED X
7807 # y = |X|, sgn = sign(X), and z = expm1(Y), #
7808 # sinh(X) = sgn*(1/2)*( z + z/(1+z) ). #
7820 # Y' := Y - 16381 log2 #
7842 #--THIS IS THE USUAL CASE, |X| < 16380 LOG2
7843 #--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )
7847 movm.l &0x8040,-(%sp) # {a1/d0}
7848 fmovm.x &0x01,-(%sp) # save Y on stack
7851 bsr setoxm1 # FP0 IS Z = EXPM1(Y)
7857 fadd.s &0x3F800000,%fp1 # 1+Z
7858 fmov.x %fp0,-(%sp)
7859 fdiv.x %fp1,%fp0 # Z/(1+Z)
7864 mov.l %d1,-(%sp)
7868 fmul.s (%sp)+,%fp0 # last fp inst - possible exceptions set
7875 fsub.d T1(%pc),%fp0 # (|X|-16381LOG2_LEAD)
7876 mov.l &0,-(%sp)
7877 mov.l &0x80000000,-(%sp)
7881 mov.l %d1,-(%sp) # EXTENDED FMT
7882 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE
7884 mov.l %d0,-(%sp)
7886 fmovm.x &0x01,-(%sp) # save fp0 on stack
7898 #--SINH(X) = X FOR DENORMALIZED X
7922 # 1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3. #
7924 # 2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by #
7925 # sgn := sign(X), y := 2|X|, z := expm1(Y), and #
7926 # tanh(X) = sgn*( z/(2+z) ). #
7929 # 3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1, #
7935 # sgn := sign(X), y := 2|X|, z := exp(Y), #
7936 # tanh(X) = sgn - [ sgn*2/(1+z) ]. #
7939 # 6. (|X| >= 50 log2) Tanh(X) = +-1 (round to nearest). Thus, we #
7941 # sgn := sign(X), Tiny := 2**(-126), #
7942 # tanh(X) := sgn - sgn*Tiny. #
7945 # 7. (|X| < 2**(-40)). Tanh(X) = X. Exit. #
7965 cmp.l %d1, &0x3fd78000 # is |X| < 2^(-40)?
7970 #--THIS IS THE USUAL CASE
7971 #--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).
7981 mov.l %d0,-(%sp)
7983 fmovm.x &0x1,-(%sp) # save Y on stack
7985 bsr setoxm1 # FP0 IS Z = EXPM1(Y)
7990 fadd.s &0x40000000,%fp1 # Z+2
8006 #-- (5/2) LOG2 < |X| < 50 LOG2,
8007 #--TANH(X) = 1 - (2/[EXP(2X)+1]). LET Y = 2|X|, SGN = SIGN(X),
8008 #--TANH(X) = SGN - SGN*2/[EXP(Y)+1].
8019 mov.l %d0,-(%sp)
8021 fmovm.x &0x01,-(%sp) # save Y on stack
8029 eor.l &0xC0000000,%d1 # -SIGN(X)*2
8030 fmov.s %d1,%fp1 # -SIGN(X)*2 IN SGL FMT
8031 fdiv.x %fp0,%fp1 # -SIGN(X)2 / [EXP(Y)+1 ]
8045 fmov.x X(%a6),%fp0 # last inst - possible exception set
8048 #---RETURN SGN(X) - SGN(X)EPS
8055 eor.l &0x80800000,%d1 # -SIGN(X)*EPS
8062 #--TANH(X) = X FOR DENORMALIZED X
8087 # Step 1. If |X-1| < 1/16, approximate log(X) by an odd #
8088 # polynomial in u, where u = 2(X-1)/(X+1). Otherwise, #
8092 # seven significant bits of Y plus 2**(-7), i.e. #
8094 # of Y. Note that |Y-F| <= 2**(-7). #
8096 # Step 3. Define u = (Y-F)/F. Approximate log(1+u) by a #
8112 # approximates log(1+u), u = (Y-F)/F. #
8117 # 1/F are also tabulated so that the division in (Y-F)/F #
8121 # the value Y-F has to be calculated carefully when #
8318 #--ENTRY POINT FOR LOG(X) FOR X FINITE, NON-ZERO, NOT NAN'S
8324 #--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
8325 #--A FINITE, NON-ZERO, NORMALIZED NUMBER.
8340 ble.w LOGNEAR1 # NO
8343 #--THIS SHOULD BE THE USUAL CASE, X NOT VERY CLOSE TO 1
8345 #--X = 2^(K) * Y, 1 <= Y < 2. THUS, Y = 1.XXXXXXXX....XX IN BINARY.
8346 #--WE DEFINE F = 1.XXXXXX1, I.E. FIRST 7 BITS OF Y AND ATTACH A 1.
8347 #--THE IDEA IS THAT LOG(X) = K*LOG2 + LOG(Y)
8348 #-- = K*LOG2 + LOG(F) + LOG(1 + (Y-F)/F).
8349 #--NOTE THAT U = (Y-F)/F IS VERY SMALL AND THUS APPROXIMATING
8350 #--LOG(1+U) CAN BE VERY EFFICIENT.
8351 #--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
8352 #--DIVISION IS NEEDED TO CALCULATE (Y-F)/F.
8354 #--GET K, Y, F, AND ADDRESS OF 1/F.
8360 fmov.l %d1,%fp1 # CONVERT K TO FLOATING-POINT FORMAT
8362 #--WHILE THE CONVERSION IS GOING ON, WE GET F AND ADDRESS OF 1/F
8363 mov.l &0x3FFF0000,X(%a6) # X IS NOW Y, I.E. 2^(-K)*X
8377 fsub.x F(%a6),%fp0 # Y-F
8378 fmovm.x &0xc,-(%sp) # SAVE FP2-3 WHILE FP0 IS NOT READY
8379 #--SUMMARY: FP0 IS Y-F, A0 IS ADDRESS OF 1/F, FP1 IS K
8380 #--REGISTERS SAVED: FPCR, FP1, FP2
8383 #--AN RE-ENTRY POINT FOR LOGNP1
8384 fmul.x (%a0),%fp0 # FP0 IS U = (Y-F)/F
8390 #--LOG(1+U) IS APPROXIMATED BY
8391 #--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
8392 #--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))]
8417 fmovm.x (%sp)+,&0x30 # RESTORE FP2-3
8433 #--REGISTERS SAVED: FPCR, FP1. FP0 CONTAINS THE INPUT.
8435 fsub.s one(%pc),%fp1 # FP1 IS X-1
8437 fadd.x %fp1,%fp1 # FP1 IS 2(X-1)
8438 #--LOG(X) = LOG(1+U/2)-LOG(1-U/2) WHICH IS AN ODD POLYNOMIAL
8439 #--IN U, U = 2(X-1)/(X+1) = FP1/FP0
8442 #--THIS IS AN RE-ENTRY POINT FOR LOGNP1
8444 fmovm.x &0xc,-(%sp) # SAVE FP2-3
8445 #--REGISTERS SAVED ARE NOW FPCR,FP1,FP2,FP3
8446 #--LET V=U*U, W=V*V, CALCULATE
8447 #--U + U*V*(B1 + V*(B2 + V*(B3 + V*(B4 + V*B5)))) BY
8448 #--U + U*V*( [B1 + W*(B3 + W*B5)] + [V*(B2 + W*B4)] )
8472 fmovm.x (%sp)+,&0x30 # FP2-3 RESTORED
8480 #--REGISTERS SAVED FPCR. LOG(-VE) IS INVALID
8486 #--ENTRY POINT FOR LOG(X) FOR DENORMALIZED INPUT
8488 mov.l &-100,ADJK(%a6) # INPUT = 2^(ADJK) * FP0
8490 #----normalize the input value by left shifting k bits (k to be determined
8491 #----below), adjusting exponent and storing -k to ADJK
8492 #----the value TWOTO100 is no longer needed.
8493 #----Note that this code assumes the denormalized input is NON-ZERO.
8495 movm.l &0x3f00,-(%sp) # save some registers {d2-d7}
8519 movm.l (%sp)+,&0xfc # restore registers {d2-d7}
8541 movm.l (%sp)+,&0xfc # restore registers {d2-d7}
8546 #--ENTRY POINT FOR LOG(1+X) FOR X FINITE, NON-ZERO, NOT NAN'S
8560 fmov.x %fp0,%fp1 # FP1 IS INPUT Z
8561 fadd.s one(%pc),%fp0 # X := ROUND(1+Z)
8566 ble.w LP1NEG0 # LOG OF ZERO OR -VE
8571 #--IF 1+Z > 3/2 OR 1+Z < 1/2, THEN X, WHICH IS ROUNDING 1+Z,
8572 #--CONTAINS AT LEAST 63 BITS OF INFORMATION OF Z. IN THAT CASE,
8573 #--SIMPLY INVOKE LOG(X) FOR LOG(1+Z).
8576 #--NEXT SEE IF EXP(-1/16) < X < EXP(1/16)
8583 #--EXP(-1/16) < X < EXP(1/16). LOG(1+Z) = LOG(1+U/2) - LOG(1-U/2)
8584 #--WHERE U = 2Z/(2+Z) = 2Z/(1+X).
8585 fadd.x %fp1,%fp1 # FP1 IS 2Z
8587 #--U = FP1/FP0
8591 #--HERE WE USE THE USUAL TABLE DRIVEN APPROACH. CARE HAS TO BE
8592 #--TAKEN BECAUSE 1+Z CAN HAVE 67 BITS OF INFORMATION AND WE MUST
8593 #--PRESERVE ALL THE INFORMATION. BECAUSE 1+Z IS IN [1/2,3/2],
8594 #--THERE ARE ONLY TWO CASES.
8595 #--CASE 1: 1+Z < 1, THEN K = -1 AND Y-F = (2-F) + 2Z
8596 #--CASE 2: 1+Z > 1, THEN K = 0 AND Y-F = (1-F) + Z
8597 #--ON RETURNING TO LP1CONT1, WE MUST HAVE K IN FP1, ADDRESS OF
8598 #--(1/F) IN A0, Y-F IN FP0, AND FP2 SAVED.
8603 cmp.l %d1,&0x3FFF8000 # SEE IF 1+Z > 1
8610 fsub.x F(%a6),%fp0 # 2-F
8616 fadd.x %fp1,%fp1 # GET 2Z
8617 fmovm.x &0xc,-(%sp) # SAVE FP2 {%fp2/%fp3}
8618 fadd.x %fp1,%fp0 # FP0 IS Y-F = (2-F)+2Z
8621 fmov.s negone(%pc),%fp1 # FP1 IS K = -1
8628 fsub.x F(%a6),%fp0 # 1-F
8634 fadd.x %fp1,%fp0 # FP0 IS Y-F
8635 fmovm.x &0xc,-(%sp) # FP2 SAVED {%fp2/%fp3}
8642 #--FPCR SAVED. D0 IS X IN COMPACT FORM.
8658 #--ENTRY POINT FOR LOG(1+Z) FOR DENORMALIZED INPUT
8688 # z := 2y/(1-y) #
8689 # atanh(X) := sgn * (1/2) * logp1(z) #
8695 # divide-by-zero by #
8713 #--THIS IS THE USUAL CASE, |X| < 1
8714 #--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).
8718 fneg.x %fp1 # -Y
8720 fadd.s &0x3F800000,%fp1 # 1-Y
8721 fdiv.x %fp1,%fp0 # 2Y/(1-Y)
8725 mov.l %d1,-(%sp)
8727 mov.l %d0,-(%sp) # save rnd prec,mode
8729 fmovm.x &0x01,-(%sp) # save Z on stack
8730 lea (%sp),%a0 # pass ptr to Z
8731 bsr slognp1 # LOG1P(Z)
8732 add.l &0xc,%sp # clear Z from stack
8747 #--ATANH(X) = X FOR DENORMALIZED X
8752 # slog10(): computes the base-10 logarithm of a normalized input #
8753 # slog10d(): computes the base-10 logarithm of a denormalized input #
8754 # slog2(): computes the base-2 logarithm of a normalized input #
8755 # slog2d(): computes the base-2 logarithm of a denormalized input #
8776 # Notes: Default means round-to-nearest mode, no floating-point #
8790 # Notes: Default means round-to-nearest mode, no floating-point #
8803 # Notes: Default means round-to-nearest mode, no floating-point #
8817 # Notes: Default means round-to-nearest mode, no floating-point #
8826 # 2.3 Return ans := convert-to-double-extended(k). #
8843 #--entry point for Log10(X), X is normalized
8851 mov.l %d0,-(%sp)
8859 #--entry point for Log10(X), X is denormalized
8863 mov.l %d0,-(%sp)
8871 #--entry point for Log2(X), X is normalized
8883 #--X = 2^k.
8893 mov.l %d0,-(%sp)
8904 #--entry point for Log2(X), X is denormalized
8908 mov.l %d0,-(%sp)
8939 # 2. If |X| < 2**(-70), go to ExpSm. #
8952 # 2. If |X| < 2**(-70), go to ExpSm. #
8955 # N := round-to-int(y). Decompose N as #
8959 # r := ((X - N*L1)-N*L2) * L10 #
9090 #--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
9099 cmp.l %d1,&0x3FB98000 # |X| >= 2**(-70)?
9109 #--USUAL CASE, 2^(-70) <= |X| <= 16480
9113 fmov.l %fp1,INT(%a6) # N = ROUND-TO-INT(64 X)
9114 mov.l %d2,-(%sp)
9116 fmov.l INT(%a6),%fp1 # N --> FLOATING FMT
9128 #--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
9129 #--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
9130 #--ADJFACT = 2^(M').
9131 #--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
9133 fmovm.x &0x0c,-(%sp) # save fp2/fp3
9141 fsub.x %fp1,%fp0 # X - (1/64)*INT(64 X)
9153 #--FPCR, D0 SAVED
9157 #--|X| IS SMALL, RETURN 1 + X
9164 #--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
9165 #--REGISTERS SAVE SO FAR ARE FPCR AND D0
9177 #--ENTRY POINT FOR 2**(X) FOR DENORMALIZED ARGUMENT
9187 #--ENTRY POINT FOR 10**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
9196 cmp.l %d1,&0x3FB98000 # |X| >= 2**(-70)?
9206 #--USUAL CASE, 2^(-70) <= |X| <= 16480 LOG 2 / LOG 10
9211 mov.l %d2,-(%sp)
9213 fmov.l INT(%a6),%fp1 # N --> FLOATING FMT
9225 #--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
9226 #--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
9227 #--ADJFACT = 2^(M').
9228 #--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
9229 fmovm.x &0x0c,-(%sp) # save fp2/fp3
9240 fsub.x %fp1,%fp0 # X - N L_LEAD
9243 fsub.x %fp2,%fp0 # X - N L_TRAIL
9254 #--FPCR, FP2, FP3 ARE SAVED IN ORDER AS SHOWN.
9255 #--ADJFACT CONTAINS 2**(M'), FACT1 + FACT2 = 2**(M) * 2**(J/64).
9256 #--FP0 IS R. THE FOLLOWING CODE COMPUTES
9257 #-- 2**(M'+M) * 2**(J/64) * EXP(R)
9279 fadd.x %fp2,%fp0 # FP0 IS EXP(R) - 1
9283 #--FINAL RECONSTRUCTION PROCESS
9284 #--EXP(X) = 2^M*2^(J/64) + 2^M*2^(J/64)*(EXP(R)-1) - (1 OR 0)
9301 #--ENTRY POINT FOR 10**(X) FOR DENORMALIZED ARGUMENT
9325 mov.l %d1,-(%sp) # save rom offset for a sec
9341 cmpi.b %d1,&0x0a # check range $01 - $0a
9343 cmpi.b %d1,&0x0e # check range $0b - $0e
9345 cmpi.b %d1,&0x2f # check range $10 - $2f
9347 cmpi.b %d1,&0x3f # check range $30 - $3f
9361 bne.b pi_not_rn # no
9369 lea.l PIRZRM(%pc),%a0 # no; load PI RZ,RM table addr
9386 subi.b &0xb,%d1 # make offset in 0-4 range
9388 bne.b sm_not_rn # no
9393 ble.b set_finx # no; answer is inexact
9399 lea.l SMALRZRM(%pc),%a0 # no; load RZ,RM table addr
9428 subi.b &0x30,%d1 # make offset in 0-f range
9430 bne.b bg_not_rn # no
9438 bra.b set_finx # no; answer is inexact
9443 lea.l BIGRZRM(%pc),%a0 # no; load RZ,RM table addr
9569 # a0 = pointer to double-extended source operand X #
9570 # a1 = pointer to double-extended destination operand Y #
9581 mov.l %d0,-(%sp) # store off ctrl bits for now
9591 cmpi.w %d0,&0x400c # no; is src too big?
9610 mov.l %d0,-(%sp) # save src for now
9623 cmpi.w %d0,&-0x3fff # is the shft amt really low?
9624 bge.b sok_norm2 # thank goodness no
9634 subi.l &-0x3fff,%d0 # how many should we shift?
9638 lsr.l %d0,%d1 # no; bit stays in upper lw
9639 clr.l -(%sp) # insert zero low mantissa
9640 mov.l %d1,-(%sp) # insert new high mantissa
9641 clr.l -(%sp) # make zero exponent
9646 mov.l %d1,-(%sp) # insert new low mantissa
9647 clr.l -(%sp) # insert zero high mantissa
9648 clr.l -(%sp) # make zero exponent
9659 swap %d0 # put exponent in high word
9660 clr.l -(%sp) # insert new exponent
9661 mov.l &0x80000000,-(%sp) # insert new high mantissa
9662 mov.l %d0,-(%sp) # insert new lo mantissa
9679 bra t_ovfl_sc # no; overflow
9690 fmov.l %d0,%fpcr # no; load control bits
9721 # Step 2. Set L := expo(X)-expo(Y), k := 0, Q := 0. #
9725 # R := 2^(-L)X, j := L. #
9730 # 3.2 If R > Y, then { R := R - Y, Q := Q + 1} #
9732 # 3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to #
9735 # Step 4. At this point, R = X - QY = MOD(X,Y). Set #
9745 # then { Q := Q + 1, signX := -signX }. #
9749 # Step 7. If Last_Subtract = true, R := R - Y. #
9753 # Step 9. At this point, R = 2^(-j)*X - Q Y = Y. Thus, #
9780 mov.l %d0,-(%sp) # save ctrl bits
9787 mov.l %d0,-(%sp) # save ctrl bits
9792 movm.l &0x3f00,-(%sp) # save data registers
9885 mov.l %d0,-(%sp) # save biased exp(X)
9886 sub.l %d3,%d0 # L := expo(X)-expo(Y)
9888 clr.l %d6 # D6 := carry <- 0
9903 #..At this point R = 2^(-L)X; Q = 0; k = 0; and k+j = L
9923 #..and Y < (D1,D2) < 2Y. Either way, perform R - Y
9924 sub.l %d5,%d2 # lo(R) - lo(Y)
9925 subx.l %d4,%d1 # hi(R) - hi(Y)
9930 #..At this point, Carry=0, R < Y. R = 2^(k-L)X - QY; k+j = L; j >= 0.
9939 subq.l &1,%d0 # j := j - 1
9940 #..At this point, R=(Carry,D1,D2) = 2^(k-L)X - QY, j+k=L, j >= 0, R < 2Y.
9945 #..k = L, j = 0, Carry = 0, R = (D1,D2) = X - QY, R < Y.
9988 fmov.x R(%a6),%fp0 # no exception
10027 fsub.x Y(%a6),%fp0 # no exceptions
10055 movm.l (%sp)+,&0xfc # {%d2-%d7}
10065 # algorithm just got done playing with fp0 and expected no exceptions
10076 #..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
10099 #..Q is odd, Q := Q + 1, signX := -signX
10125 # - Store properly signed INF into fp0. #
10126 # - Set FPSR exception status dz bit, ccode inf bit, and #
10133 tst.b SRC_EX(%a0) # no; is src negative?
10143 fmov.s &0xff800000,%fp0 # return -INF in fp0
10149 # - set FPSR exception status operr bit, condition code #
10160 # - For all functions that have a denormalized input and #
10162 # - we only return the EXOP here if either underflow or #
10181 bne.b xdnrm_sd # no
10185 bpl.b xdnrm_exit # no
10192 mov.l %a1,-(%sp)
10227 # - This routine is for cases where even an EXOP isn't #
10230 # - Return the default result to the proper precision #
10233 # - t_unfl2() is provided to force the result sign to #
10262 # - This routine is for cases where even an EXOP isn't #
10264 # - Return the default result to the proper precision #
10267 # - t_ovfl2() is provided to force the result sign to #
10269 # - t_ovfl_sc() is provided for scale() which only sets #
10283 bmi.b ovfl_sc_norm # no
10292 movm.l &0xc080,-(%sp) # save d0-d1/a0
10294 movm.l (%sp)+,&0x0103 # restore d0-d1/a0
10298 bne.b ovfl_sc_dbl # no; sgl
10308 beq.b ovfl_work # no; don't set INEX2
10342 # - the last operation of a transcendental emulation #
10352 fsave -(%sp)
10359 # - The inex2 and ainex bits are set. #
10393 fsave -(%sp)
10411 # d1.b : sign bit of result ('11111111 = (-) ; '00000000 = (+)) #
10492 mov.b &z_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
10498 fmov.s &0x80000000,%fp0 # load -0
10499 mov.b &neg_bmask+z_bmask,FPSR_CC(%a6) # set 'N','Z' ccode bits
10533 fmov.s &0xff800000,%fp0 # load -INF
10601 fmov.s &0xbf800000,%fp0 # load -1
10631 fmov.x mpiby2(%pc),%fp0 # load -pi/2
10706 short sto_cos_0 - tbl_sto_cos
10707 short sto_cos_1 - tbl_sto_cos
10708 short sto_cos_2 - tbl_sto_cos
10709 short sto_cos_3 - tbl_sto_cos
10710 short sto_cos_4 - tbl_sto_cos
10711 short sto_cos_5 - tbl_sto_cos
10712 short sto_cos_6 - tbl_sto_cos
10713 short sto_cos_7 - tbl_sto_cos
10799 mov.l %d0,-(%sp)
10952 fmov.x DST(%a1),%fp0 # return the non-signalling nan
10977 fmov.x SRC(%a0),%fp0 # return the non-signalling nan
11338 # fmul() - emulate a multiply instruction #
11339 # fadd() - emulate an add instruction #
11340 # fin() - emulate an fmove instruction #
11374 # 8/17/93 - this turns out to be more of a "cleanliness" standpoint
11411 long fin - tbl_unsupp # 00: fmove
11412 long fint - tbl_unsupp # 01: fint
11413 long fsinh - tbl_unsupp # 02: fsinh
11414 long fintrz - tbl_unsupp # 03: fintrz
11415 long fsqrt - tbl_unsupp # 04: fsqrt
11416 long tbl_unsupp - tbl_unsupp
11417 long flognp1 - tbl_unsupp # 06: flognp1
11418 long tbl_unsupp - tbl_unsupp
11419 long fetoxm1 - tbl_unsupp # 08: fetoxm1
11420 long ftanh - tbl_unsupp # 09: ftanh
11421 long fatan - tbl_unsupp # 0a: fatan
11422 long tbl_unsupp - tbl_unsupp
11423 long fasin - tbl_unsupp # 0c: fasin
11424 long fatanh - tbl_unsupp # 0d: fatanh
11425 long fsine - tbl_unsupp # 0e: fsin
11426 long ftan - tbl_unsupp # 0f: ftan
11427 long fetox - tbl_unsupp # 10: fetox
11428 long ftwotox - tbl_unsupp # 11: ftwotox
11429 long ftentox - tbl_unsupp # 12: ftentox
11430 long tbl_unsupp - tbl_unsupp
11431 long flogn - tbl_unsupp # 14: flogn
11432 long flog10 - tbl_unsupp # 15: flog10
11433 long flog2 - tbl_unsupp # 16: flog2
11434 long tbl_unsupp - tbl_unsupp
11435 long fabs - tbl_unsupp # 18: fabs
11436 long fcosh - tbl_unsupp # 19: fcosh
11437 long fneg - tbl_unsupp # 1a: fneg
11438 long tbl_unsupp - tbl_unsupp
11439 long facos - tbl_unsupp # 1c: facos
11440 long fcos - tbl_unsupp # 1d: fcos
11441 long fgetexp - tbl_unsupp # 1e: fgetexp
11442 long fgetman - tbl_unsupp # 1f: fgetman
11443 long fdiv - tbl_unsupp # 20: fdiv
11444 long fmod - tbl_unsupp # 21: fmod
11445 long fadd - tbl_unsupp # 22: fadd
11446 long fmul - tbl_unsupp # 23: fmul
11447 long fsgldiv - tbl_unsupp # 24: fsgldiv
11448 long frem - tbl_unsupp # 25: frem
11449 long fscale - tbl_unsupp # 26: fscale
11450 long fsglmul - tbl_unsupp # 27: fsglmul
11451 long fsub - tbl_unsupp # 28: fsub
11452 long tbl_unsupp - tbl_unsupp
11453 long tbl_unsupp - tbl_unsupp
11454 long tbl_unsupp - tbl_unsupp
11455 long tbl_unsupp - tbl_unsupp
11456 long tbl_unsupp - tbl_unsupp
11457 long tbl_unsupp - tbl_unsupp
11458 long tbl_unsupp - tbl_unsupp
11459 long fsincos - tbl_unsupp # 30: fsincos
11460 long fsincos - tbl_unsupp # 31: fsincos
11461 long fsincos - tbl_unsupp # 32: fsincos
11462 long fsincos - tbl_unsupp # 33: fsincos
11463 long fsincos - tbl_unsupp # 34: fsincos
11464 long fsincos - tbl_unsupp # 35: fsincos
11465 long fsincos - tbl_unsupp # 36: fsincos
11466 long fsincos - tbl_unsupp # 37: fsincos
11467 long fcmp - tbl_unsupp # 38: fcmp
11468 long tbl_unsupp - tbl_unsupp
11469 long ftst - tbl_unsupp # 3a: ftst
11470 long tbl_unsupp - tbl_unsupp
11471 long tbl_unsupp - tbl_unsupp
11472 long tbl_unsupp - tbl_unsupp
11473 long tbl_unsupp - tbl_unsupp
11474 long tbl_unsupp - tbl_unsupp
11475 long fsin - tbl_unsupp # 40: fsmove
11476 long fssqrt - tbl_unsupp # 41: fssqrt
11477 long tbl_unsupp - tbl_unsupp
11478 long tbl_unsupp - tbl_unsupp
11479 long fdin - tbl_unsupp # 44: fdmove
11480 long fdsqrt - tbl_unsupp # 45: fdsqrt
11481 long tbl_unsupp - tbl_unsupp
11482 long tbl_unsupp - tbl_unsupp
11483 long tbl_unsupp - tbl_unsupp
11484 long tbl_unsupp - tbl_unsupp
11485 long tbl_unsupp - tbl_unsupp
11486 long tbl_unsupp - tbl_unsupp
11487 long tbl_unsupp - tbl_unsupp
11488 long tbl_unsupp - tbl_unsupp
11489 long tbl_unsupp - tbl_unsupp
11490 long tbl_unsupp - tbl_unsupp
11491 long tbl_unsupp - tbl_unsupp
11492 long tbl_unsupp - tbl_unsupp
11493 long tbl_unsupp - tbl_unsupp
11494 long tbl_unsupp - tbl_unsupp
11495 long tbl_unsupp - tbl_unsupp
11496 long tbl_unsupp - tbl_unsupp
11497 long tbl_unsupp - tbl_unsupp
11498 long tbl_unsupp - tbl_unsupp
11499 long fsabs - tbl_unsupp # 58: fsabs
11500 long tbl_unsupp - tbl_unsupp
11501 long fsneg - tbl_unsupp # 5a: fsneg
11502 long tbl_unsupp - tbl_unsupp
11503 long fdabs - tbl_unsupp # 5c: fdabs
11504 long tbl_unsupp - tbl_unsupp
11505 long fdneg - tbl_unsupp # 5e: fdneg
11506 long tbl_unsupp - tbl_unsupp
11507 long fsdiv - tbl_unsupp # 60: fsdiv
11508 long tbl_unsupp - tbl_unsupp
11509 long fsadd - tbl_unsupp # 62: fsadd
11510 long fsmul - tbl_unsupp # 63: fsmul
11511 long fddiv - tbl_unsupp # 64: fddiv
11512 long tbl_unsupp - tbl_unsupp
11513 long fdadd - tbl_unsupp # 66: fdadd
11514 long fdmul - tbl_unsupp # 67: fdmul
11515 long fssub - tbl_unsupp # 68: fssub
11516 long tbl_unsupp - tbl_unsupp
11517 long tbl_unsupp - tbl_unsupp
11518 long tbl_unsupp - tbl_unsupp
11519 long fdsub - tbl_unsupp # 6c: fdsub
11528 # scale_to_zero_src() - scale src exponent to zero #
11529 # scale_to_zero_dst() - scale dst exponent to zero #
11530 # unf_res() - return default underflow result #
11531 # ovf_res() - return default overflow result #
11532 # res_qnan() - return QNAN result #
11533 # res_snan() - return SNAN result #
11558 long 0x3fff - 0x7ffe # ext_max
11559 long 0x3fff - 0x407e # sgl_max
11560 long 0x3fff - 0x43fe # dbl_max
11563 long 0x3fff - 0x3f80 # sgl_unfl
11564 long 0x3fff - 0x3c00 # dbl_unfl
11585 bne.w fmul_not_norm # optimize on non-norm input
11597 mov.l %d0,-(%sp) # save scale factor 1
11611 beq.w fmul_may_unfl # result may rnd to no unfl
11616 # - the result of the multiply operation will neither overflow nor underflow.
11617 # - do the multiply to the proper precision and rounding mode.
11618 # - scale the result exponent using the scale factor. if both operands were
11637 mov.l %d2,-(%sp) # save d2
11651 # - the result of the multiply operation is an overflow.
11652 # - do the multiply to the proper precision and rounding mode in order to
11654 # - calculate the default result and return it in fp0.
11655 # - if overflow or inexact is enabled, we need a multiply result rounded to
11659 # of this operation then has its exponent scaled by -0x6000 to create the
11695 # - if precision is extended, then we have the EXOP. simply bias the exponent
11696 # with an extra -0x6000. if the precision is single or double, we need to
11707 mov.l %d2,-(%sp) # save d2
11735 # - the result of the multiply operation MAY overflow.
11736 # - do the multiply to the proper precision and rounding mode in order to
11738 # - calculate the default result and return it in fp0.
11757 # no, it didn't overflow; we have correct result
11762 # - the result of the multiply operation is an underflow.
11763 # - do the multiply to the proper precision and rounding mode in order to
11765 # - calculate the default result and return it in fp0.
11766 # - if overflow or inexact is enabled, we need a multiply result rounded to
11770 # of this operation then has its exponent scaled by -0x6000 to create the
11801 or.b %d0,FPSR_CC(%a6) # unf_res2 may have set 'Z'
11813 bne.b fmul_unfl_ena_sd # no, sgl or dbl
11815 # if the rnd mode is anything but RZ, then we have to re-do the above
11827 mov.l %d2,-(%sp) # save d2
11849 # -use the correct rounding mode and precision. this code favors operations
11866 fbgt.w fmul_normal_exit # no; no underflow occurred
11873 # using RZ as the rounding mode to see what the pre-rounded result is.
11890 fbge.w fmul_normal_exit # no; no underflow occurred
11904 short fmul_norm - tbl_fmul_op # NORM x NORM
11905 short fmul_zero - tbl_fmul_op # NORM x ZERO
11906 short fmul_inf_src - tbl_fmul_op # NORM x INF
11907 short fmul_res_qnan - tbl_fmul_op # NORM x QNAN
11908 short fmul_norm - tbl_fmul_op # NORM x DENORM
11909 short fmul_res_snan - tbl_fmul_op # NORM x SNAN
11910 short tbl_fmul_op - tbl_fmul_op #
11911 short tbl_fmul_op - tbl_fmul_op #
11913 short fmul_zero - tbl_fmul_op # ZERO x NORM
11914 short fmul_zero - tbl_fmul_op # ZERO x ZERO
11915 short fmul_res_operr - tbl_fmul_op # ZERO x INF
11916 short fmul_res_qnan - tbl_fmul_op # ZERO x QNAN
11917 short fmul_zero - tbl_fmul_op # ZERO x DENORM
11918 short fmul_res_snan - tbl_fmul_op # ZERO x SNAN
11919 short tbl_fmul_op - tbl_fmul_op #
11920 short tbl_fmul_op - tbl_fmul_op #
11922 short fmul_inf_dst - tbl_fmul_op # INF x NORM
11923 short fmul_res_operr - tbl_fmul_op # INF x ZERO
11924 short fmul_inf_dst - tbl_fmul_op # INF x INF
11925 short fmul_res_qnan - tbl_fmul_op # INF x QNAN
11926 short fmul_inf_dst - tbl_fmul_op # INF x DENORM
11927 short fmul_res_snan - tbl_fmul_op # INF x SNAN
11928 short tbl_fmul_op - tbl_fmul_op #
11929 short tbl_fmul_op - tbl_fmul_op #
11931 short fmul_res_qnan - tbl_fmul_op # QNAN x NORM
11932 short fmul_res_qnan - tbl_fmul_op # QNAN x ZERO
11933 short fmul_res_qnan - tbl_fmul_op # QNAN x INF
11934 short fmul_res_qnan - tbl_fmul_op # QNAN x QNAN
11935 short fmul_res_qnan - tbl_fmul_op # QNAN x DENORM
11936 short fmul_res_snan - tbl_fmul_op # QNAN x SNAN
11937 short tbl_fmul_op - tbl_fmul_op #
11938 short tbl_fmul_op - tbl_fmul_op #
11940 short fmul_norm - tbl_fmul_op # NORM x NORM
11941 short fmul_zero - tbl_fmul_op # NORM x ZERO
11942 short fmul_inf_src - tbl_fmul_op # NORM x INF
11943 short fmul_res_qnan - tbl_fmul_op # NORM x QNAN
11944 short fmul_norm - tbl_fmul_op # NORM x DENORM
11945 short fmul_res_snan - tbl_fmul_op # NORM x SNAN
11946 short tbl_fmul_op - tbl_fmul_op #
11947 short tbl_fmul_op - tbl_fmul_op #
11949 short fmul_res_snan - tbl_fmul_op # SNAN x NORM
11950 short fmul_res_snan - tbl_fmul_op # SNAN x ZERO
11951 short fmul_res_snan - tbl_fmul_op # SNAN x INF
11952 short fmul_res_snan - tbl_fmul_op # SNAN x QNAN
11953 short fmul_res_snan - tbl_fmul_op # SNAN x DENORM
11954 short fmul_res_snan - tbl_fmul_op # SNAN x SNAN
11955 short tbl_fmul_op - tbl_fmul_op #
11956 short tbl_fmul_op - tbl_fmul_op #
11975 fmov.s &0x80000000,%fp0 # load -ZERO
11976 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
11980 mov.b &z_bmask,FPSR_CC(%a6) # set Z
11986 # Note: The j-bit for an infinity is a don't-care. However, to be
11988 # INF w/ the j-bit set if the input INF j-bit was set. Destination
12024 # norm() - normalize mantissa for EXOP on denorm #
12025 # scale_to_zero_src() - scale src exponent to zero #
12026 # ovf_res() - return default overflow result #
12027 # unf_res() - return default underflow result #
12028 # res_qnan_1op() - return QNAN result #
12029 # res_snan_1op() - return SNAN result #
12046 # exception is enabled. If no exception, return the default result. #
12067 bne.w fin_not_norm # optimize on non-norm input
12074 bne.w fin_not_ext # no, so go handle dbl or sgl
12082 bpl.b fin_norm_done # no
12090 # the accrued bit is NOT set in this instance(no inexactness!)
12094 bne.w fin_not_ext # no, so go handle dbl or sgl
12098 bpl.b fin_denorm_done # no
12117 neg.w %d0 # new exponent = -(shft val)
12143 cmpi.l %d0,&0x3fff-0x3f80 # will move in underflow?
12145 cmpi.l %d0,&0x3fff-0x407e # will move in overflow?
12164 mov.l %d2,-(%sp) # save d2
12186 cmpi.l %d0,&0x3fff-0x3c00 # will move in underflow?
12188 cmpi.l %d0,&0x3fff-0x43fe # will move in overflow?
12191 bra.w fin_sd_normal # no; ho handle normalized op
12213 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
12226 mov.l %d2,-(%sp) # save d2
12279 mov.l %d2,-(%sp) # save d2
12311 # no, it didn't overflow; we have correct result
12333 fmov.l %fpsr,%d0 # no exceptions possible
12345 # scale_to_zero_src() - scale src exponent to zero #
12346 # scale_to_zero_dst() - scale dst exponent to zero #
12347 # unf_res() - return default underflow result #
12348 # ovf_res() - return default overflow result #
12349 # res_qnan() - return QNAN result #
12350 # res_snan() - return SNAN result #
12375 long 0x3fff - 0x0000 # ext_unfl
12376 long 0x3fff - 0x3f81 # sgl_unfl
12377 long 0x3fff - 0x3c01 # dbl_unfl
12380 long 0x3fff - 0x7ffe # ext overflow exponent
12381 long 0x3fff - 0x407e # sgl overflow exponent
12382 long 0x3fff - 0x43fe # dbl overflow exponent
12404 bne.w fdiv_not_norm # optimize on non-norm input
12419 mov.l %d0,-(%sp) # save scale factor 1
12423 neg.l (%sp) # SCALE FACTOR = scale1 - scale2
12451 mov.l %d2,-(%sp) # store d2
12473 mov.l %d0,-(%sp) # save scale factor
12487 fmovm.x &0x01,-(%sp) # save result to stack
12515 bne.b fdiv_ovfl_ena_sd # no, do sgl or dbl
12520 mov.l %d2,-(%sp) # save d2
12571 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
12583 bne.b fdiv_unfl_ena_sd # no, sgl or dbl
12595 mov.l %d2,-(%sp) # save d2
12634 fbgt.w fdiv_normal_exit # no; no underflow occurred
12641 # operation using RZ as the rounding mode to see what the pre-rounded
12658 fbge.w fdiv_normal_exit # no; no underflow occurred
12672 short fdiv_norm - tbl_fdiv_op # NORM / NORM
12673 short fdiv_inf_load - tbl_fdiv_op # NORM / ZERO
12674 short fdiv_zero_load - tbl_fdiv_op # NORM / INF
12675 short fdiv_res_qnan - tbl_fdiv_op # NORM / QNAN
12676 short fdiv_norm - tbl_fdiv_op # NORM / DENORM
12677 short fdiv_res_snan - tbl_fdiv_op # NORM / SNAN
12678 short tbl_fdiv_op - tbl_fdiv_op #
12679 short tbl_fdiv_op - tbl_fdiv_op #
12681 short fdiv_zero_load - tbl_fdiv_op # ZERO / NORM
12682 short fdiv_res_operr - tbl_fdiv_op # ZERO / ZERO
12683 short fdiv_zero_load - tbl_fdiv_op # ZERO / INF
12684 short fdiv_res_qnan - tbl_fdiv_op # ZERO / QNAN
12685 short fdiv_zero_load - tbl_fdiv_op # ZERO / DENORM
12686 short fdiv_res_snan - tbl_fdiv_op # ZERO / SNAN
12687 short tbl_fdiv_op - tbl_fdiv_op #
12688 short tbl_fdiv_op - tbl_fdiv_op #
12690 short fdiv_inf_dst - tbl_fdiv_op # INF / NORM
12691 short fdiv_inf_dst - tbl_fdiv_op # INF / ZERO
12692 short fdiv_res_operr - tbl_fdiv_op # INF / INF
12693 short fdiv_res_qnan - tbl_fdiv_op # INF / QNAN
12694 short fdiv_inf_dst - tbl_fdiv_op # INF / DENORM
12695 short fdiv_res_snan - tbl_fdiv_op # INF / SNAN
12696 short tbl_fdiv_op - tbl_fdiv_op #
12697 short tbl_fdiv_op - tbl_fdiv_op #
12699 short fdiv_res_qnan - tbl_fdiv_op # QNAN / NORM
12700 short fdiv_res_qnan - tbl_fdiv_op # QNAN / ZERO
12701 short fdiv_res_qnan - tbl_fdiv_op # QNAN / INF
12702 short fdiv_res_qnan - tbl_fdiv_op # QNAN / QNAN
12703 short fdiv_res_qnan - tbl_fdiv_op # QNAN / DENORM
12704 short fdiv_res_snan - tbl_fdiv_op # QNAN / SNAN
12705 short tbl_fdiv_op - tbl_fdiv_op #
12706 short tbl_fdiv_op - tbl_fdiv_op #
12708 short fdiv_norm - tbl_fdiv_op # DENORM / NORM
12709 short fdiv_inf_load - tbl_fdiv_op # DENORM / ZERO
12710 short fdiv_zero_load - tbl_fdiv_op # DENORM / INF
12711 short fdiv_res_qnan - tbl_fdiv_op # DENORM / QNAN
12712 short fdiv_norm - tbl_fdiv_op # DENORM / DENORM
12713 short fdiv_res_snan - tbl_fdiv_op # DENORM / SNAN
12714 short tbl_fdiv_op - tbl_fdiv_op #
12715 short tbl_fdiv_op - tbl_fdiv_op #
12717 short fdiv_res_snan - tbl_fdiv_op # SNAN / NORM
12718 short fdiv_res_snan - tbl_fdiv_op # SNAN / ZERO
12719 short fdiv_res_snan - tbl_fdiv_op # SNAN / INF
12720 short fdiv_res_snan - tbl_fdiv_op # SNAN / QNAN
12721 short fdiv_res_snan - tbl_fdiv_op # SNAN / DENORM
12722 short fdiv_res_snan - tbl_fdiv_op # SNAN / SNAN
12723 short tbl_fdiv_op - tbl_fdiv_op #
12724 short tbl_fdiv_op - tbl_fdiv_op #
12739 fmov.s &0x80000000,%fp0 # load a -ZERO
12740 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
12744 mov.b &z_bmask,FPSR_CC(%a6) # set Z
12750 # So, determine the sign and return a new INF (w/ the j-bit cleared).
12754 ori.w &dz_mask+adz_mask,2+USER_FPSR(%a6) # no; set DZ/ADZ
12759 fmov.s &0xff800000,%fp0 # make result -INF
12770 # The 68881/882 returns the destination INF w/ the new sign(if the j-bit of the
12771 # dst INF is set, then then j-bit of the result INF is also set).
12799 # norm() - normalize a denorm to provide EXOP #
12800 # scale_to_zero_src() - scale sgl/dbl source exponent #
12801 # ovf_res() - return default overflow result #
12802 # unf_res() - return default underflow result #
12803 # res_qnan_1op() - return QNAN result #
12804 # res_snan_1op() - return SNAN result #
12840 bne.w fneg_not_norm # optimize on non-norm input
12847 bne.w fneg_not_ext # no; go handle sgl or dbl
12867 # the accrued bit is NOT set in this instance(no inexactness!)
12871 bne.b fneg_not_ext # no; go handle sgl or dbl
12879 bpl.b fneg_denorm_done # no
12897 neg.w %d0 # new exponent = -(shft val)
12923 cmpi.l %d0,&0x3fff-0x3f80 # will move in underflow?
12925 cmpi.l %d0,&0x3fff-0x407e # will move in overflow?
12944 mov.l %d2,-(%sp) # save d2
12966 cmpi.l %d0,&0x3fff-0x3c00 # will move in underflow?
12968 cmpi.l %d0,&0x3fff-0x43fe # will move in overflow?
12971 bra.w fneg_sd_normal # no; ho handle normalized op
12993 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
13006 mov.l %d2,-(%sp) # save d2
13059 mov.l %d2,-(%sp) # save d2
13091 # no, it didn't overflow; we have correct result
13123 # res{s,q}nan_1op() - set NAN result for monadic instruction #
13140 bne.b ftst_not_norm # optimize on non-norm input
13200 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
13208 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13221 # For denorms, force the j-bit to a one and do the same as for #
13232 bne.b fint_not_norm # optimize on non-norm input
13268 # for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
13288 mov.b &z_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
13291 fmov.s &0x80000000,%fp0 # return -ZERO in fp0
13292 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
13314 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13327 # For denorms, force the j-bit to a one and do the same as for #
13338 bne.b fintrz_not_norm # optimize on non-norm input
13370 # for DENORMs, the result will be (+/-)ZERO.
13390 mov.b &z_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
13393 fmov.s &0x80000000,%fp0 # return -ZERO in fp0
13394 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
13418 # norm() - normalize denorm mantissa to provide EXOP #
13419 # scale_to_zero_src() - make exponent. = 0; get scale factor #
13420 # unf_res() - calculate underflow result #
13421 # ovf_res() - calculate overflow result #
13422 # res_{s,q}nan_1op() - set NAN result for monadic operation #
13442 # exceptional case. If no exception should occur, insert the correct #
13463 bne.w fabs_not_norm # optimize on non-norm input
13470 bne.b fabs_not_ext # no; go handle sgl or dbl
13487 # the accrued bit is NOT set in this instance(no inexactness!)
13491 bne.b fabs_not_ext # no
13515 neg.w %d0 # new exponent = -(shft val)
13541 cmpi.l %d0,&0x3fff-0x3f80 # will move in underflow?
13543 cmpi.l %d0,&0x3fff-0x407e # will move in overflow?
13562 mov.l %d2,-(%sp) # save d2
13584 cmpi.l %d0,&0x3fff-0x3c00 # will move in underflow?
13586 cmpi.l %d0,&0x3fff-0x43fe # will move in overflow?
13589 bra.w fabs_sd_normal # no; ho handle normalized op
13608 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
13621 mov.l %d2,-(%sp) # save d2
13674 mov.l %d2,-(%sp) # save d2
13706 # no, it didn't overflow; we have correct result
13727 mov.b &z_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
13738 # res_qnan() - return QNAN result #
13739 # res_snan() - return SNAN result #
13762 bne.b fcmp_not_norm # optimize on non-norm input
13774 mov.b %d0,FPSR_CC(%a6) # set ccode bits(no exc bits are set)
13787 short fcmp_norm - tbl_fcmp_op # NORM - NORM
13788 short fcmp_norm - tbl_fcmp_op # NORM - ZERO
13789 short fcmp_norm - tbl_fcmp_op # NORM - INF
13790 short fcmp_res_qnan - tbl_fcmp_op # NORM - QNAN
13791 short fcmp_nrm_dnrm - tbl_fcmp_op # NORM - DENORM
13792 short fcmp_res_snan - tbl_fcmp_op # NORM - SNAN
13793 short tbl_fcmp_op - tbl_fcmp_op #
13794 short tbl_fcmp_op - tbl_fcmp_op #
13796 short fcmp_norm - tbl_fcmp_op # ZERO - NORM
13797 short fcmp_norm - tbl_fcmp_op # ZERO - ZERO
13798 short fcmp_norm - tbl_fcmp_op # ZERO - INF
13799 short fcmp_res_qnan - tbl_fcmp_op # ZERO - QNAN
13800 short fcmp_dnrm_s - tbl_fcmp_op # ZERO - DENORM
13801 short fcmp_res_snan - tbl_fcmp_op # ZERO - SNAN
13802 short tbl_fcmp_op - tbl_fcmp_op #
13803 short tbl_fcmp_op - tbl_fcmp_op #
13805 short fcmp_norm - tbl_fcmp_op # INF - NORM
13806 short fcmp_norm - tbl_fcmp_op # INF - ZERO
13807 short fcmp_norm - tbl_fcmp_op # INF - INF
13808 short fcmp_res_qnan - tbl_fcmp_op # INF - QNAN
13809 short fcmp_dnrm_s - tbl_fcmp_op # INF - DENORM
13810 short fcmp_res_snan - tbl_fcmp_op # INF - SNAN
13811 short tbl_fcmp_op - tbl_fcmp_op #
13812 short tbl_fcmp_op - tbl_fcmp_op #
13814 short fcmp_res_qnan - tbl_fcmp_op # QNAN - NORM
13815 short fcmp_res_qnan - tbl_fcmp_op # QNAN - ZERO
13816 short fcmp_res_qnan - tbl_fcmp_op # QNAN - INF
13817 short fcmp_res_qnan - tbl_fcmp_op # QNAN - QNAN
13818 short fcmp_res_qnan - tbl_fcmp_op # QNAN - DENORM
13819 short fcmp_res_snan - tbl_fcmp_op # QNAN - SNAN
13820 short tbl_fcmp_op - tbl_fcmp_op #
13821 short tbl_fcmp_op - tbl_fcmp_op #
13823 short fcmp_dnrm_nrm - tbl_fcmp_op # DENORM - NORM
13824 short fcmp_dnrm_d - tbl_fcmp_op # DENORM - ZERO
13825 short fcmp_dnrm_d - tbl_fcmp_op # DENORM - INF
13826 short fcmp_res_qnan - tbl_fcmp_op # DENORM - QNAN
13827 short fcmp_dnrm_sd - tbl_fcmp_op # DENORM - DENORM
13828 short fcmp_res_snan - tbl_fcmp_op # DENORM - SNAN
13829 short tbl_fcmp_op - tbl_fcmp_op #
13830 short tbl_fcmp_op - tbl_fcmp_op #
13832 short fcmp_res_snan - tbl_fcmp_op # SNAN - NORM
13833 short fcmp_res_snan - tbl_fcmp_op # SNAN - ZERO
13834 short fcmp_res_snan - tbl_fcmp_op # SNAN - INF
13835 short fcmp_res_snan - tbl_fcmp_op # SNAN - QNAN
13836 short fcmp_res_snan - tbl_fcmp_op # SNAN - DENORM
13837 short fcmp_res_snan - tbl_fcmp_op # SNAN - SNAN
13838 short tbl_fcmp_op - tbl_fcmp_op #
13839 short tbl_fcmp_op - tbl_fcmp_op #
13854 # If you have a 2 DENORMs, then you can just force the j-bit to a one
13856 # If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
13861 # (2) signs are (-) and the DENORM is the src
13908 mov.b &neg_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
13919 bpl.b fcmp_dnrm_nrm_m # no
13922 mov.b &neg_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
13930 # scale_to_zero_src() - scale src exponent to zero #
13931 # scale_to_zero_dst() - scale dst exponent to zero #
13932 # unf_res4() - return default underflow result for sglop #
13933 # ovf_res() - return default overflow result #
13934 # res_qnan() - return QNAN result #
13935 # res_snan() - return SNAN result #
13967 bne.w fsglmul_not_norm # optimize on non-norm input
13979 mov.l %d0,-(%sp) # save scale factor 1
13985 cmpi.l %d0,&0x3fff-0x7ffe # would result ovfl?
13990 beq.w fsglmul_may_unfl # result may rnd to no unfl
14008 mov.l %d2,-(%sp) # save d2
14055 mov.l %d2,-(%sp) # save d2
14086 # no, it didn't overflow; we have correct result
14114 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
14132 mov.l %d2,-(%sp) # save d2
14161 fbgt.w fsglmul_normal_exit # no; no underflow occurred
14168 # using RZ as the rounding mode to see what the pre-rounded result is.
14185 fbge.w fsglmul_normal_exit # no; no underflow occurred
14199 short fsglmul_norm - tbl_fsglmul_op # NORM x NORM
14200 short fsglmul_zero - tbl_fsglmul_op # NORM x ZERO
14201 short fsglmul_inf_src - tbl_fsglmul_op # NORM x INF
14202 short fsglmul_res_qnan - tbl_fsglmul_op # NORM x QNAN
14203 short fsglmul_norm - tbl_fsglmul_op # NORM x DENORM
14204 short fsglmul_res_snan - tbl_fsglmul_op # NORM x SNAN
14205 short tbl_fsglmul_op - tbl_fsglmul_op #
14206 short tbl_fsglmul_op - tbl_fsglmul_op #
14208 short fsglmul_zero - tbl_fsglmul_op # ZERO x NORM
14209 short fsglmul_zero - tbl_fsglmul_op # ZERO x ZERO
14210 short fsglmul_res_operr - tbl_fsglmul_op # ZERO x INF
14211 short fsglmul_res_qnan - tbl_fsglmul_op # ZERO x QNAN
14212 short fsglmul_zero - tbl_fsglmul_op # ZERO x DENORM
14213 short fsglmul_res_snan - tbl_fsglmul_op # ZERO x SNAN
14214 short tbl_fsglmul_op - tbl_fsglmul_op #
14215 short tbl_fsglmul_op - tbl_fsglmul_op #
14217 short fsglmul_inf_dst - tbl_fsglmul_op # INF x NORM
14218 short fsglmul_res_operr - tbl_fsglmul_op # INF x ZERO
14219 short fsglmul_inf_dst - tbl_fsglmul_op # INF x INF
14220 short fsglmul_res_qnan - tbl_fsglmul_op # INF x QNAN
14221 short fsglmul_inf_dst - tbl_fsglmul_op # INF x DENORM
14222 short fsglmul_res_snan - tbl_fsglmul_op # INF x SNAN
14223 short tbl_fsglmul_op - tbl_fsglmul_op #
14224 short tbl_fsglmul_op - tbl_fsglmul_op #
14226 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x NORM
14227 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x ZERO
14228 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x INF
14229 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x QNAN
14230 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x DENORM
14231 short fsglmul_res_snan - tbl_fsglmul_op # QNAN x SNAN
14232 short tbl_fsglmul_op - tbl_fsglmul_op #
14233 short tbl_fsglmul_op - tbl_fsglmul_op #
14235 short fsglmul_norm - tbl_fsglmul_op # NORM x NORM
14236 short fsglmul_zero - tbl_fsglmul_op # NORM x ZERO
14237 short fsglmul_inf_src - tbl_fsglmul_op # NORM x INF
14238 short fsglmul_res_qnan - tbl_fsglmul_op # NORM x QNAN
14239 short fsglmul_norm - tbl_fsglmul_op # NORM x DENORM
14240 short fsglmul_res_snan - tbl_fsglmul_op # NORM x SNAN
14241 short tbl_fsglmul_op - tbl_fsglmul_op #
14242 short tbl_fsglmul_op - tbl_fsglmul_op #
14244 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x NORM
14245 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x ZERO
14246 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x INF
14247 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x QNAN
14248 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x DENORM
14249 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x SNAN
14250 short tbl_fsglmul_op - tbl_fsglmul_op #
14251 short tbl_fsglmul_op - tbl_fsglmul_op #
14271 # scale_to_zero_src() - scale src exponent to zero #
14272 # scale_to_zero_dst() - scale dst exponent to zero #
14273 # unf_res4() - return default underflow result for sglop #
14274 # ovf_res() - return default overflow result #
14275 # res_qnan() - return QNAN result #
14276 # res_snan() - return SNAN result #
14308 bne.w fsgldiv_not_norm # optimize on non-norm input
14323 mov.l %d0,-(%sp) # save scale factor 1
14327 neg.l (%sp) # S.F. = scale1 - scale2
14333 cmpi.l %d0,&0x3fff-0x7ffe
14336 cmpi.l %d0,&0x3fff-0x0000 # will result underflow?
14355 mov.l %d2,-(%sp) # save d2
14380 fmovm.x &0x01,-(%sp) # save result to stack
14408 mov.l %d2,-(%sp) # save d2
14447 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
14465 mov.l %d2,-(%sp) # save d2
14497 fbgt.w fsgldiv_normal_exit # no; no underflow occurred
14504 # operation using RZ as the rounding mode to see what the pre-rounded
14520 fbge.w fsgldiv_normal_exit # no; no underflow occurred
14534 short fsgldiv_norm - tbl_fsgldiv_op # NORM / NORM
14535 short fsgldiv_inf_load - tbl_fsgldiv_op # NORM / ZERO
14536 short fsgldiv_zero_load - tbl_fsgldiv_op # NORM / INF
14537 short fsgldiv_res_qnan - tbl_fsgldiv_op # NORM / QNAN
14538 short fsgldiv_norm - tbl_fsgldiv_op # NORM / DENORM
14539 short fsgldiv_res_snan - tbl_fsgldiv_op # NORM / SNAN
14540 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14541 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14543 short fsgldiv_zero_load - tbl_fsgldiv_op # ZERO / NORM
14544 short fsgldiv_res_operr - tbl_fsgldiv_op # ZERO / ZERO
14545 short fsgldiv_zero_load - tbl_fsgldiv_op # ZERO / INF
14546 short fsgldiv_res_qnan - tbl_fsgldiv_op # ZERO / QNAN
14547 short fsgldiv_zero_load - tbl_fsgldiv_op # ZERO / DENORM
14548 short fsgldiv_res_snan - tbl_fsgldiv_op # ZERO / SNAN
14549 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14550 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14552 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / NORM
14553 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / ZERO
14554 short fsgldiv_res_operr - tbl_fsgldiv_op # INF / INF
14555 short fsgldiv_res_qnan - tbl_fsgldiv_op # INF / QNAN
14556 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / DENORM
14557 short fsgldiv_res_snan - tbl_fsgldiv_op # INF / SNAN
14558 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14559 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14561 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / NORM
14562 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / ZERO
14563 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / INF
14564 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / QNAN
14565 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / DENORM
14566 short fsgldiv_res_snan - tbl_fsgldiv_op # QNAN / SNAN
14567 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14568 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14570 short fsgldiv_norm - tbl_fsgldiv_op # DENORM / NORM
14571 short fsgldiv_inf_load - tbl_fsgldiv_op # DENORM / ZERO
14572 short fsgldiv_zero_load - tbl_fsgldiv_op # DENORM / INF
14573 short fsgldiv_res_qnan - tbl_fsgldiv_op # DENORM / QNAN
14574 short fsgldiv_norm - tbl_fsgldiv_op # DENORM / DENORM
14575 short fsgldiv_res_snan - tbl_fsgldiv_op # DENORM / SNAN
14576 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14577 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14579 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / NORM
14580 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / ZERO
14581 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / INF
14582 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / QNAN
14583 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / DENORM
14584 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / SNAN
14585 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14586 short tbl_fsgldiv_op - tbl_fsgldiv_op #
14608 # addsub_scaler2() - scale the operands so they won't take exc #
14609 # ovf_res() - return default overflow result #
14610 # unf_res() - return default underflow result #
14611 # res_qnan() - set QNAN result #
14612 # res_snan() - set SNAN result #
14613 # res_operr() - set OPERR result #
14614 # scale_to_zero_src() - set src operand exponent equal to zero #
14615 # scale_to_zero_dst() - set dst operand exponent equal to zero #
14655 bne.w fadd_not_norm # optimize on non-norm input
14672 fmov.l %fpsr,%d1 # fetch INEX2,N,Z
14678 mov.l %d2,-(%sp) # save d2
14680 fmovm.x &0x01,-(%sp) # save result to stack
14742 bne.b fadd_ovfl_ena_sd # no; prec = sgl or dbl
14767 fmovm.x &0x01,-(%sp)
14797 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
14807 bne.b fadd_unfl_ena_sd # no; sgl or dbl
14846 beq.w fadd_normal # yes; no underflow occurred
14850 bne.w fadd_normal # no; no underflow occurred
14853 bne.w fadd_normal # no; no underflow occurred
14856 beq.w fadd_normal # no; no underflow occurred
14861 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
14863 # now, we must determine whether the pre-rounded result was an underflow
14865 # so, we do this be re-executing the add using RZ as the rounding mode and
14885 bra.w fadd_normal # no; it's not an underflow
14898 short fadd_norm - tbl_fadd_op # NORM + NORM
14899 short fadd_zero_src - tbl_fadd_op # NORM + ZERO
14900 short fadd_inf_src - tbl_fadd_op # NORM + INF
14901 short fadd_res_qnan - tbl_fadd_op # NORM + QNAN
14902 short fadd_norm - tbl_fadd_op # NORM + DENORM
14903 short fadd_res_snan - tbl_fadd_op # NORM + SNAN
14904 short tbl_fadd_op - tbl_fadd_op #
14905 short tbl_fadd_op - tbl_fadd_op #
14907 short fadd_zero_dst - tbl_fadd_op # ZERO + NORM
14908 short fadd_zero_2 - tbl_fadd_op # ZERO + ZERO
14909 short fadd_inf_src - tbl_fadd_op # ZERO + INF
14910 short fadd_res_qnan - tbl_fadd_op # NORM + QNAN
14911 short fadd_zero_dst - tbl_fadd_op # ZERO + DENORM
14912 short fadd_res_snan - tbl_fadd_op # NORM + SNAN
14913 short tbl_fadd_op - tbl_fadd_op #
14914 short tbl_fadd_op - tbl_fadd_op #
14916 short fadd_inf_dst - tbl_fadd_op # INF + NORM
14917 short fadd_inf_dst - tbl_fadd_op # INF + ZERO
14918 short fadd_inf_2 - tbl_fadd_op # INF + INF
14919 short fadd_res_qnan - tbl_fadd_op # NORM + QNAN
14920 short fadd_inf_dst - tbl_fadd_op # INF + DENORM
14921 short fadd_res_snan - tbl_fadd_op # NORM + SNAN
14922 short tbl_fadd_op - tbl_fadd_op #
14923 short tbl_fadd_op - tbl_fadd_op #
14925 short fadd_res_qnan - tbl_fadd_op # QNAN + NORM
14926 short fadd_res_qnan - tbl_fadd_op # QNAN + ZERO
14927 short fadd_res_qnan - tbl_fadd_op # QNAN + INF
14928 short fadd_res_qnan - tbl_fadd_op # QNAN + QNAN
14929 short fadd_res_qnan - tbl_fadd_op # QNAN + DENORM
14930 short fadd_res_snan - tbl_fadd_op # QNAN + SNAN
14931 short tbl_fadd_op - tbl_fadd_op #
14932 short tbl_fadd_op - tbl_fadd_op #
14934 short fadd_norm - tbl_fadd_op # DENORM + NORM
14935 short fadd_zero_src - tbl_fadd_op # DENORM + ZERO
14936 short fadd_inf_src - tbl_fadd_op # DENORM + INF
14937 short fadd_res_qnan - tbl_fadd_op # NORM + QNAN
14938 short fadd_norm - tbl_fadd_op # DENORM + DENORM
14939 short fadd_res_snan - tbl_fadd_op # NORM + SNAN
14940 short tbl_fadd_op - tbl_fadd_op #
14941 short tbl_fadd_op - tbl_fadd_op #
14943 short fadd_res_snan - tbl_fadd_op # SNAN + NORM
14944 short fadd_res_snan - tbl_fadd_op # SNAN + ZERO
14945 short fadd_res_snan - tbl_fadd_op # SNAN + INF
14946 short fadd_res_snan - tbl_fadd_op # SNAN + QNAN
14947 short fadd_res_snan - tbl_fadd_op # SNAN + DENORM
14948 short fadd_res_snan - tbl_fadd_op # SNAN + SNAN
14949 short tbl_fadd_op - tbl_fadd_op #
14950 short tbl_fadd_op - tbl_fadd_op #
14964 bmi.w fadd_zero_2_chk_rm # weed out (-ZERO)+(+ZERO)
14971 mov.b &z_bmask,FPSR_CC(%a6) # set Z
14976 # - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
14977 # - -ZERO is returned in the case of RM.
14985 mov.b &z_bmask,FPSR_CC(%a6) # set Z
14989 fmov.s &0x80000000,%fp0 # return -ZERO
14990 mov.b &neg_bmask+z_bmask,FPSR_CC(%a6) # set NEG/Z
15025 bmi.l res_operr # weed out (-INF)+(+INF)
15028 # src INF since that's where the 881/882 gets the j-bit from...
15061 # addsub_scaler2() - scale the operands so they won't take exc #
15062 # ovf_res() - return default overflow result #
15063 # unf_res() - return default underflow result #
15064 # res_qnan() - set QNAN result #
15065 # res_snan() - set SNAN result #
15066 # res_operr() - set OPERR result #
15067 # scale_to_zero_src() - set src operand exponent equal to zero #
15068 # scale_to_zero_dst() - set dst operand exponent equal to zero #
15108 bne.w fsub_not_norm # optimize on non-norm input
15125 fmov.l %fpsr,%d1 # fetch INEX2, N, Z
15131 mov.l %d2,-(%sp) # save d2
15133 fmovm.x &0x01,-(%sp) # save result to stack
15195 bne.b fsub_ovfl_ena_sd # no
15220 fmovm.x &0x01,-(%sp)
15250 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
15260 bne.b fsub_unfl_ena_sd # no
15299 beq.w fsub_normal # yes; no underflow occurred
15303 bne.w fsub_normal # no; no underflow occurred
15306 bne.w fsub_normal # no; no underflow occurred
15309 beq.w fsub_normal # no; no underflow occurred
15314 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
15316 # now, we must determine whether the pre-rounded result was an underflow
15318 # so, we do this be re-executing the add using RZ as the rounding mode and
15338 bra.w fsub_normal # no; it's not an underflow
15351 short fsub_norm - tbl_fsub_op # NORM - NORM
15352 short fsub_zero_src - tbl_fsub_op # NORM - ZERO
15353 short fsub_inf_src - tbl_fsub_op # NORM - INF
15354 short fsub_res_qnan - tbl_fsub_op # NORM - QNAN
15355 short fsub_norm - tbl_fsub_op # NORM - DENORM
15356 short fsub_res_snan - tbl_fsub_op # NORM - SNAN
15357 short tbl_fsub_op - tbl_fsub_op #
15358 short tbl_fsub_op - tbl_fsub_op #
15360 short fsub_zero_dst - tbl_fsub_op # ZERO - NORM
15361 short fsub_zero_2 - tbl_fsub_op # ZERO - ZERO
15362 short fsub_inf_src - tbl_fsub_op # ZERO - INF
15363 short fsub_res_qnan - tbl_fsub_op # NORM - QNAN
15364 short fsub_zero_dst - tbl_fsub_op # ZERO - DENORM
15365 short fsub_res_snan - tbl_fsub_op # NORM - SNAN
15366 short tbl_fsub_op - tbl_fsub_op #
15367 short tbl_fsub_op - tbl_fsub_op #
15369 short fsub_inf_dst - tbl_fsub_op # INF - NORM
15370 short fsub_inf_dst - tbl_fsub_op # INF - ZERO
15371 short fsub_inf_2 - tbl_fsub_op # INF - INF
15372 short fsub_res_qnan - tbl_fsub_op # NORM - QNAN
15373 short fsub_inf_dst - tbl_fsub_op # INF - DENORM
15374 short fsub_res_snan - tbl_fsub_op # NORM - SNAN
15375 short tbl_fsub_op - tbl_fsub_op #
15376 short tbl_fsub_op - tbl_fsub_op #
15378 short fsub_res_qnan - tbl_fsub_op # QNAN - NORM
15379 short fsub_res_qnan - tbl_fsub_op # QNAN - ZERO
15380 short fsub_res_qnan - tbl_fsub_op # QNAN - INF
15381 short fsub_res_qnan - tbl_fsub_op # QNAN - QNAN
15382 short fsub_res_qnan - tbl_fsub_op # QNAN - DENORM
15383 short fsub_res_snan - tbl_fsub_op # QNAN - SNAN
15384 short tbl_fsub_op - tbl_fsub_op #
15385 short tbl_fsub_op - tbl_fsub_op #
15387 short fsub_norm - tbl_fsub_op # DENORM - NORM
15388 short fsub_zero_src - tbl_fsub_op # DENORM - ZERO
15389 short fsub_inf_src - tbl_fsub_op # DENORM - INF
15390 short fsub_res_qnan - tbl_fsub_op # NORM - QNAN
15391 short fsub_norm - tbl_fsub_op # DENORM - DENORM
15392 short fsub_res_snan - tbl_fsub_op # NORM - SNAN
15393 short tbl_fsub_op - tbl_fsub_op #
15394 short tbl_fsub_op - tbl_fsub_op #
15396 short fsub_res_snan - tbl_fsub_op # SNAN - NORM
15397 short fsub_res_snan - tbl_fsub_op # SNAN - ZERO
15398 short fsub_res_snan - tbl_fsub_op # SNAN - INF
15399 short fsub_res_snan - tbl_fsub_op # SNAN - QNAN
15400 short fsub_res_snan - tbl_fsub_op # SNAN - DENORM
15401 short fsub_res_snan - tbl_fsub_op # SNAN - SNAN
15402 short tbl_fsub_op - tbl_fsub_op #
15403 short tbl_fsub_op - tbl_fsub_op #
15422 fmov.s &0x00000000,%fp0 # no; return +ZERO
15423 mov.b &z_bmask,FPSR_CC(%a6) # set Z
15428 # - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
15429 # - -ZERO is returned in the case of RM.
15436 fmov.s &0x00000000,%fp0 # no; return +ZERO
15437 mov.b &z_bmask,FPSR_CC(%a6) # set Z
15441 fmov.s &0x80000000,%fp0 # return -ZERO
15442 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/NEG
15477 bpl.l res_operr # weed out (-INF)+(+INF)
15480 # the src INF since that's where the 881/882 gets the j-bit.
15492 bpl.b fsub_inf_done # no
15507 # scale_sqrt() - scale the source operand #
15508 # unf_res() - return default underflow result #
15509 # ovf_res() - return default overflow result #
15510 # res_qnan_1op() - return QNAN result #
15511 # res_snan_1op() - return SNAN result #
15549 bne.w fsqrt_not_norm # optimize on non-norm input
15559 bne.b fsqrt_not_ext # no; go handle sgl or dbl
15576 bne.b fsqrt_not_ext # no; go handle sgl or dbl
15603 cmpi.l %d0,&0x3fff-0x3f81 # will move in underflow?
15606 cmpi.l %d0,&0x3fff-0x407f # will move in overflow?
15625 mov.l %d2,-(%sp) # save d2
15648 cmpi.l %d0,&0x3fff-0x3c01 # will move in underflow?
15651 cmpi.l %d0,&0x3fff-0x43ff # will move in overflow?
15654 bra.w fsqrt_sd_normal # no; ho handle normalized op
15661 bne.w fsqrt_sd_normal # yes, so no underflow
15690 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
15703 mov.l %d2,-(%sp) # save d2
15756 mov.l %d2,-(%sp) # save d2
15791 # no, it didn't overflow; we have correct result
15812 # fsqrt(-0) = -0
15814 # fsqrt(-INF) = OPERR
15821 mov.b &z_bmask,FPSR_CC(%a6) # set 'Z' ccode bit
15824 fmov.s &0x80000000,%fp0 # return -ZERO
15825 mov.b &z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
15840 # addsub_scaler2(): scale inputs to fadd/fsub such that no #
15844 # norm() - normalize mantissa after adjusting exponent #
15888 mov.l %d0,-(%sp) # save scale factor
15895 neg.w %d0 # new exp = -(shft val)
15925 mov.l %d0,-(%sp) # save scale factor
15931 neg.w %d0 # new exp = -(shft val)
15966 # norm() - normalize the mantissa if the operand was a DENORM #
16000 sub.l %d1,%d0 # scale = BIAS + (-exp)
16007 neg.l %d0 # new exponent = -(shft val)
16019 # norm() - normalize the mantissa if the operand was a DENORM #
16031 # to 0x3ffe and return a scale factor of "(exp-0x3ffe)/2". If the #
16033 # return a scale factor of "(exp-0x3fff)/2". #
16053 sub.l %d1,%d0 # scale = BIAS + (-exp)
16061 sub.l %d1,%d0 # scale = BIAS + (-exp)
16093 # norm() - normalize the mantissa if the operand was a DENORM #
16127 sub.l %d1,%d0 # scale = BIAS + (-exp)
16133 neg.l %d0 # new exponent = -(shft val)
16254 # fetch_dreg() - fetch Dn value #
16255 # store_dreg_l() - store updated Dn value #
16273 # Dn is fetched and decremented by one. If Dn is not equal to -1, add #
16293 short fdbcc_f - tbl_fdbcc # 00
16294 short fdbcc_eq - tbl_fdbcc # 01
16295 short fdbcc_ogt - tbl_fdbcc # 02
16296 short fdbcc_oge - tbl_fdbcc # 03
16297 short fdbcc_olt - tbl_fdbcc # 04
16298 short fdbcc_ole - tbl_fdbcc # 05
16299 short fdbcc_ogl - tbl_fdbcc # 06
16300 short fdbcc_or - tbl_fdbcc # 07
16301 short fdbcc_un - tbl_fdbcc # 08
16302 short fdbcc_ueq - tbl_fdbcc # 09
16303 short fdbcc_ugt - tbl_fdbcc # 10
16304 short fdbcc_uge - tbl_fdbcc # 11
16305 short fdbcc_ult - tbl_fdbcc # 12
16306 short fdbcc_ule - tbl_fdbcc # 13
16307 short fdbcc_neq - tbl_fdbcc # 14
16308 short fdbcc_t - tbl_fdbcc # 15
16309 short fdbcc_sf - tbl_fdbcc # 16
16310 short fdbcc_seq - tbl_fdbcc # 17
16311 short fdbcc_gt - tbl_fdbcc # 18
16312 short fdbcc_ge - tbl_fdbcc # 19
16313 short fdbcc_lt - tbl_fdbcc # 20
16314 short fdbcc_le - tbl_fdbcc # 21
16315 short fdbcc_gl - tbl_fdbcc # 22
16316 short fdbcc_gle - tbl_fdbcc # 23
16317 short fdbcc_ngle - tbl_fdbcc # 24
16318 short fdbcc_ngl - tbl_fdbcc # 25
16319 short fdbcc_nle - tbl_fdbcc # 26
16320 short fdbcc_nlt - tbl_fdbcc # 27
16321 short fdbcc_nge - tbl_fdbcc # 28
16322 short fdbcc_ngt - tbl_fdbcc # 29
16323 short fdbcc_sneq - tbl_fdbcc # 30
16324 short fdbcc_st - tbl_fdbcc # 31
16347 # Z
16352 bra.w fdbcc_false # no; go handle counter
16359 # Z
16364 bra.w fdbcc_false # no; go handle counter
16376 beq.w fdbcc_false # no;go handle counter
16380 bra.w fdbcc_false # no; go handle counter
16392 bra.w fdbcc_false # no; go handle counter
16395 beq.b fdbcc_ngt_done # no;go finish
16400 rts # no; do nothing
16411 beq.w fdbcc_false # no;go handle counter
16415 bra.w fdbcc_false # no; go handle counter
16418 beq.b fdbcc_ge_yes_done # no;go do nothing
16428 # NANv(N^Z)
16433 bra.w fdbcc_false # no; go handle counter
16436 beq.b fdbcc_nge_done # no;go finish
16441 rts # no; do nothing
16452 beq.w fdbcc_false # no; go handle counter
16456 bra.w fdbcc_false # no; go handle counter
16468 bra.w fdbcc_false # no; go handle counter
16471 beq.b fdbcc_nlt_done # no;go finish
16476 rts # no; do nothing
16487 beq.w fdbcc_false # no; go handle counter
16491 bra.w fdbcc_false # no; go handle counter
16494 beq.b fdbcc_le_yes_done # no; go do nothing
16509 bra.w fdbcc_false # no; go handle counter
16512 beq.w fdbcc_nle_done # no; go finish
16517 rts # no; do nothing
16528 beq.w fdbcc_false # no; handle counter
16532 bra.w fdbcc_false # no; go handle counter
16544 bra.w fdbcc_false # no; go handle counter
16547 beq.b fdbcc_ngl_done # no; go finish
16552 rts # no; do nothing
16565 bra.w fdbcc_false # no; go handle counter
16577 bra.w fdbcc_false # no; go handle counter
16582 rts # no; do nothing
16597 fdbcc_f: # no bsun possible
16605 fdbcc_t: # no bsun possible
16615 beq.w fdbcc_false # no;go handle counter
16628 beq.b fdbcc_st_done # no;go finish
16638 # Z
16644 beq.w fdbcc_false # no;go handle counter
16651 beq.b fdbcc_seq_yes_done # no;go do nothing
16661 # Z
16667 beq.w fdbcc_false # no;go handle counter
16674 beq.w fdbcc_sneq_done # no;go finish
16700 bra.w fdbcc_false # no; go handle counter
16712 bra.w fdbcc_false # no; go handle counter
16724 bra.w fdbcc_false # no; go handle counter
16731 # NANv(N^Z)
16736 bra.w fdbcc_false # no; go handle counter
16748 bra.w fdbcc_false # no; go handle counter
16760 bra.w fdbcc_false # no; go handle counter
16772 bra.w fdbcc_false # no; go handle counter
16784 bra.w fdbcc_false # no; go handle counter
16796 bra.w fdbcc_false # no; go handle counter
16808 bra.w fdbcc_false # no; go handle counter
16820 bra.w fdbcc_false # no; go handle counter
16832 bra.w fdbcc_false # no; go handle counter
16842 # (2) if (cr == -1) then
16845 # pc += sign_ext(16-bit displacement)
16854 subq.w &0x1, %d0 # Dn - 1 -> Dn
16858 cmpi.w %d0, &-0x1 # is (Dn == -1)?
16859 bne.b fdbcc_false_cont # no;
16921 short ftrapcc_f - tbl_ftrapcc # 00
16922 short ftrapcc_eq - tbl_ftrapcc # 01
16923 short ftrapcc_ogt - tbl_ftrapcc # 02
16924 short ftrapcc_oge - tbl_ftrapcc # 03
16925 short ftrapcc_olt - tbl_ftrapcc # 04
16926 short ftrapcc_ole - tbl_ftrapcc # 05
16927 short ftrapcc_ogl - tbl_ftrapcc # 06
16928 short ftrapcc_or - tbl_ftrapcc # 07
16929 short ftrapcc_un - tbl_ftrapcc # 08
16930 short ftrapcc_ueq - tbl_ftrapcc # 09
16931 short ftrapcc_ugt - tbl_ftrapcc # 10
16932 short ftrapcc_uge - tbl_ftrapcc # 11
16933 short ftrapcc_ult - tbl_ftrapcc # 12
16934 short ftrapcc_ule - tbl_ftrapcc # 13
16935 short ftrapcc_neq - tbl_ftrapcc # 14
16936 short ftrapcc_t - tbl_ftrapcc # 15
16937 short ftrapcc_sf - tbl_ftrapcc # 16
16938 short ftrapcc_seq - tbl_ftrapcc # 17
16939 short ftrapcc_gt - tbl_ftrapcc # 18
16940 short ftrapcc_ge - tbl_ftrapcc # 19
16941 short ftrapcc_lt - tbl_ftrapcc # 20
16942 short ftrapcc_le - tbl_ftrapcc # 21
16943 short ftrapcc_gl - tbl_ftrapcc # 22
16944 short ftrapcc_gle - tbl_ftrapcc # 23
16945 short ftrapcc_ngle - tbl_ftrapcc # 24
16946 short ftrapcc_ngl - tbl_ftrapcc # 25
16947 short ftrapcc_nle - tbl_ftrapcc # 26
16948 short ftrapcc_nlt - tbl_ftrapcc # 27
16949 short ftrapcc_nge - tbl_ftrapcc # 28
16950 short ftrapcc_ngt - tbl_ftrapcc # 29
16951 short ftrapcc_sneq - tbl_ftrapcc # 30
16952 short ftrapcc_st - tbl_ftrapcc # 31
16973 # Z
16983 # Z
16999 beq.b ftrapcc_gt_done # no
17004 rts # no; do nothing
17017 beq.w ftrapcc_trap # no; go take trap
17021 bra.w ftrapcc_trap # no; go take trap
17032 beq.b ftrapcc_ge_done # no; go finish
17037 rts # no; do nothing
17040 beq.w ftrapcc_trap # no; go take trap
17044 bra.w ftrapcc_trap # no; go take trap
17049 # NANv(N^Z)
17057 beq.w ftrapcc_trap # no; go take trap
17061 bra.w ftrapcc_trap # no; go take trap
17072 beq.b ftrapcc_lt_done # no; go finish
17077 rts # no; do nothing
17090 beq.w ftrapcc_trap # no; go take trap
17094 bra.w ftrapcc_trap # no; go take trap
17105 beq.b ftrapcc_le_done # no; go finish
17110 rts # no; do nothing
17113 beq.w ftrapcc_trap # no; go take trap
17117 bra.w ftrapcc_trap # no; go take trap
17130 beq.w ftrapcc_trap # no; go take trap
17134 bra.w ftrapcc_trap # no; go take trap
17145 beq.b ftrapcc_gl_done # no; go finish
17150 rts # no; do nothing
17163 beq.w ftrapcc_trap # no; go take trap
17167 bra.w ftrapcc_trap # no; go take trap
17180 rts # no; do nothing
17195 bra.w ftrapcc_trap # no; go take trap
17230 beq.b ftrapcc_sf_done # no; go finish
17235 rts # no; do nothing
17244 beq.w ftrapcc_trap # no; go take trap
17248 bra.w ftrapcc_trap # no; go take trap
17253 # Z
17259 beq.w ftrapcc_seq_done # no; go finish
17264 rts # no; do nothing
17267 beq.w ftrapcc_trap # no; go take trap
17271 bra.w ftrapcc_trap # no; go take trap
17276 # Z
17282 beq.w ftrapcc_sneq_no_done # no; go finish
17290 beq.w ftrapcc_trap # no; go take trap
17294 bra.w ftrapcc_trap # no; go take trap
17339 # NANv(N^Z)
17453 # store_dreg_b() - store result to data register file #
17454 # dec_areg() - decrement an areg for -(an) mode #
17455 # inc_areg() - increment an areg for (an)+ mode #
17456 # _dmem_write_byte() - store result to memory #
17491 short fscc_f - tbl_fscc # 00
17492 short fscc_eq - tbl_fscc # 01
17493 short fscc_ogt - tbl_fscc # 02
17494 short fscc_oge - tbl_fscc # 03
17495 short fscc_olt - tbl_fscc # 04
17496 short fscc_ole - tbl_fscc # 05
17497 short fscc_ogl - tbl_fscc # 06
17498 short fscc_or - tbl_fscc # 07
17499 short fscc_un - tbl_fscc # 08
17500 short fscc_ueq - tbl_fscc # 09
17501 short fscc_ugt - tbl_fscc # 10
17502 short fscc_uge - tbl_fscc # 11
17503 short fscc_ult - tbl_fscc # 12
17504 short fscc_ule - tbl_fscc # 13
17505 short fscc_neq - tbl_fscc # 14
17506 short fscc_t - tbl_fscc # 15
17507 short fscc_sf - tbl_fscc # 16
17508 short fscc_seq - tbl_fscc # 17
17509 short fscc_gt - tbl_fscc # 18
17510 short fscc_ge - tbl_fscc # 19
17511 short fscc_lt - tbl_fscc # 20
17512 short fscc_le - tbl_fscc # 21
17513 short fscc_gl - tbl_fscc # 22
17514 short fscc_gle - tbl_fscc # 23
17515 short fscc_ngle - tbl_fscc # 24
17516 short fscc_ngl - tbl_fscc # 25
17517 short fscc_nle - tbl_fscc # 26
17518 short fscc_nlt - tbl_fscc # 27
17519 short fscc_nge - tbl_fscc # 28
17520 short fscc_ngt - tbl_fscc # 29
17521 short fscc_sneq - tbl_fscc # 30
17522 short fscc_st - tbl_fscc # 31
17543 # Z
17557 # Z
17578 beq.w fscc_done # no;go finish
17598 beq.w fscc_done # no;go finish
17612 beq.w fscc_done # no;go finish
17618 beq.w fscc_done # no;go finish
17625 # NANv(N^Z)
17635 beq.w fscc_done # no;go finish
17649 beq.w fscc_done # no;go finish
17669 beq.w fscc_done # no;go finish
17683 beq.w fscc_done # no;go finish
17689 beq.w fscc_done # no;go finish
17706 beq.w fscc_done # no;go finish
17720 beq.w fscc_done # no;go finish
17740 beq.w fscc_done # no;go finish
17810 beq.w fscc_done # no;go finish
17822 beq.w fscc_done # no;go finish
17829 # Z
17836 beq.w fscc_done # no;go finish
17842 beq.w fscc_done # no;go finish
17849 # Z
17856 beq.w fscc_done # no;go finish
17862 beq.w fscc_done # no;go finish
17921 # NANv(N^Z)
18078 # -> Dn : <ea> is garbage
18080 # if the addressing mode is post-increment or pre-decrement,
18086 cmpi.b %d1,&0x20 # is <ea> -(An) ?
18098 # addressing mode is post-increment. write the result byte. if the write
18116 # addressing mode is pre-decrement. write the result byte. if the write
18153 # fetch_dreg() - fetch data register #
18154 # {i,d,}mem_read() - fetch data from memory #
18155 # _mem_write() - write data to memory #
18156 # iea_iacc() - instruction memory access error occurred #
18157 # iea_dacc() - data memory access error occurred #
18158 # restore() - restore An index regs if access error occurred #
18164 # If instr is "fmovm Dn,-(A7)" from supervisor mode, #
18190 # If the instruction is "fmovm.x DN,-(a7)" from supervisor mode, #
18228 mov.l %d0,-(%sp) # save strg
18230 mov.l %d0,-(%sp) # save size
18235 # if the bit string is a zero, then the operation is a no-op
18261 cmpi.b SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
18264 # the operation was unfortunately an: fmovm.x dn,-(sp)
18277 bpl.b fmovm_out_ctrl_fp1 # no
18285 bpl.b fmovm_out_ctrl_fp2 # no
18293 bpl.b fmovm_out_ctrl_fp3 # no
18300 bpl.b fmovm_out_ctrl_fp4 # no
18307 bpl.b fmovm_out_ctrl_fp5 # no
18314 bpl.b fmovm_out_ctrl_fp6 # no
18321 bpl.b fmovm_out_ctrl_fp7 # no
18328 bpl.b fmovm_out_ctrl_done # no
18337 mov.l %d0,-(%sp) # save size
18357 mov.l %d1,-(%sp) # save bit string for later
18358 mov.l %d0,-(%sp) # save # of bytes
18372 bpl.b fmovm_data_in_fp1 # no
18380 bpl.b fmovm_data_in_fp2 # no
18388 bpl.b fmovm_data_in_fp3 # no
18394 bpl.b fmovm_data_in_fp4 # no
18400 bpl.b fmovm_data_in_fp5 # no
18406 bpl.b fmovm_data_in_fp6 # no
18412 bpl.b fmovm_data_in_fp7 # no
18418 bpl.b fmovm_data_in_done # no
18474 # table to convert a pre-decrement bit string into a post-increment
18540 short tbl_fea_mode - tbl_fea_mode
18541 short tbl_fea_mode - tbl_fea_mode
18542 short tbl_fea_mode - tbl_fea_mode
18543 short tbl_fea_mode - tbl_fea_mode
18544 short tbl_fea_mode - tbl_fea_mode
18545 short tbl_fea_mode - tbl_fea_mode
18546 short tbl_fea_mode - tbl_fea_mode
18547 short tbl_fea_mode - tbl_fea_mode
18549 short tbl_fea_mode - tbl_fea_mode
18550 short tbl_fea_mode - tbl_fea_mode
18551 short tbl_fea_mode - tbl_fea_mode
18552 short tbl_fea_mode - tbl_fea_mode
18553 short tbl_fea_mode - tbl_fea_mode
18554 short tbl_fea_mode - tbl_fea_mode
18555 short tbl_fea_mode - tbl_fea_mode
18556 short tbl_fea_mode - tbl_fea_mode
18558 short faddr_ind_a0 - tbl_fea_mode
18559 short faddr_ind_a1 - tbl_fea_mode
18560 short faddr_ind_a2 - tbl_fea_mode
18561 short faddr_ind_a3 - tbl_fea_mode
18562 short faddr_ind_a4 - tbl_fea_mode
18563 short faddr_ind_a5 - tbl_fea_mode
18564 short faddr_ind_a6 - tbl_fea_mode
18565 short faddr_ind_a7 - tbl_fea_mode
18567 short faddr_ind_p_a0 - tbl_fea_mode
18568 short faddr_ind_p_a1 - tbl_fea_mode
18569 short faddr_ind_p_a2 - tbl_fea_mode
18570 short faddr_ind_p_a3 - tbl_fea_mode
18571 short faddr_ind_p_a4 - tbl_fea_mode
18572 short faddr_ind_p_a5 - tbl_fea_mode
18573 short faddr_ind_p_a6 - tbl_fea_mode
18574 short faddr_ind_p_a7 - tbl_fea_mode
18576 short faddr_ind_m_a0 - tbl_fea_mode
18577 short faddr_ind_m_a1 - tbl_fea_mode
18578 short faddr_ind_m_a2 - tbl_fea_mode
18579 short faddr_ind_m_a3 - tbl_fea_mode
18580 short faddr_ind_m_a4 - tbl_fea_mode
18581 short faddr_ind_m_a5 - tbl_fea_mode
18582 short faddr_ind_m_a6 - tbl_fea_mode
18583 short faddr_ind_m_a7 - tbl_fea_mode
18585 short faddr_ind_disp_a0 - tbl_fea_mode
18586 short faddr_ind_disp_a1 - tbl_fea_mode
18587 short faddr_ind_disp_a2 - tbl_fea_mode
18588 short faddr_ind_disp_a3 - tbl_fea_mode
18589 short faddr_ind_disp_a4 - tbl_fea_mode
18590 short faddr_ind_disp_a5 - tbl_fea_mode
18591 short faddr_ind_disp_a6 - tbl_fea_mode
18592 short faddr_ind_disp_a7 - tbl_fea_mode
18594 short faddr_ind_ext - tbl_fea_mode
18595 short faddr_ind_ext - tbl_fea_mode
18596 short faddr_ind_ext - tbl_fea_mode
18597 short faddr_ind_ext - tbl_fea_mode
18598 short faddr_ind_ext - tbl_fea_mode
18599 short faddr_ind_ext - tbl_fea_mode
18600 short faddr_ind_ext - tbl_fea_mode
18601 short faddr_ind_ext - tbl_fea_mode
18603 short fabs_short - tbl_fea_mode
18604 short fabs_long - tbl_fea_mode
18605 short fpc_ind - tbl_fea_mode
18606 short fpc_ind_ext - tbl_fea_mode
18607 short tbl_fea_mode - tbl_fea_mode
18608 short tbl_fea_mode - tbl_fea_mode
18609 short tbl_fea_mode - tbl_fea_mode
18610 short tbl_fea_mode - tbl_fea_mode
18717 # Address register indirect w/ predecrement: -(An) #
18885 # Address register indirect w/ index(8-bit displacement): (d8, An, Xn) #
18893 mov.l %d0,-(%sp)
18916 mov.l %d2,-(%sp) # save d2
18984 # PC indirect w/ index(8-bit displacement): (d8, PC, An) #
19012 mov.l %d2,-(%sp) # save d2
19040 movm.l &0x3c00,-(%sp) # save d2-d5
19054 movm.l &0x3c00,-(%sp) # save d2-d5
19170 movm.l (%sp)+,&0x003c # restore d2-d5
19177 movm.l (%sp)+,&0x003c # restore d2-d5
19182 movm.l (%sp)+,&0x003c # restore d2-d5
19203 # _imem_read_long() - read longword from memory #
19204 # iea_iacc() - _imem_read_long() failed; error recovery #
19338 # inc_areg() - increment an address register #
19339 # dec_areg() - decrement an address register #
19352 # 1) -(An) : The register is not updated regardless of size. #
19375 cmpi.b %d0,&0x20 # is mode -(An) ?
19390 lea ([USER_FPIAR,%a6],0x4),%a0 # no; return <ea>
19404 # it would make no sense to have a pre-decrement to a7 in supervisor
19436 # stacked for the exception is incorrect for -(an) and (an)+ addressing #
19439 # So, for -(an), we must subtract 8 off of the stacked <ea> value #
19458 cmpi.b %d0,&0x20 # is mode -(An) ?
19474 short ceaf_pi0 - tbl_ceaf_pi
19475 short ceaf_pi1 - tbl_ceaf_pi
19476 short ceaf_pi2 - tbl_ceaf_pi
19477 short ceaf_pi3 - tbl_ceaf_pi
19478 short ceaf_pi4 - tbl_ceaf_pi
19479 short ceaf_pi5 - tbl_ceaf_pi
19480 short ceaf_pi6 - tbl_ceaf_pi
19481 short ceaf_pi7 - tbl_ceaf_pi
19509 # -(An) : extended and packed fmove out
19521 short ceaf_pd0 - tbl_ceaf_pd
19522 short ceaf_pd1 - tbl_ceaf_pd
19523 short ceaf_pd2 - tbl_ceaf_pd
19524 short ceaf_pd3 - tbl_ceaf_pd
19525 short ceaf_pd4 - tbl_ceaf_pd
19526 short ceaf_pd5 - tbl_ceaf_pd
19527 short ceaf_pd6 - tbl_ceaf_pd
19528 short ceaf_pd7 - tbl_ceaf_pd
19561 # set_tag_x() - determine ext prec optype tag #
19562 # set_tag_s() - determine sgl prec optype tag #
19563 # set_tag_d() - determine dbl prec optype tag #
19564 # unnorm_fix() - convert normalized number to denorm or zero #
19565 # norm() - normalize a denormalized number #
19566 # get_packed() - fetch a packed operand from memory #
19567 # _dcalc_ea() - calculate <ea>, fixing An in process #
19569 # _imem_read_{word,long}() - read from instruction memory #
19570 # _dmem_read() - read from data memory #
19571 # _dmem_read_{byte,word,long}() - read from data memory #
19573 # facc_in_{b,w,l,d,x}() - mem read failed; special exit point #
19590 # If the instruction is opclass two (memory->reg), then fetch #
19611 # ---------------------------------
19613 # ---------------------------------
19618 # beq.w op010 # handle <ea> -> fpn
19619 # bgt.w op011 # handle fpn -> <ea>
19626 # OPCLASS '000: reg -> reg #
19669 # OPCLASS '010: <ea> -> reg #
19711 short opd_long - tbl_op010_dreg
19712 short opd_sgl - tbl_op010_dreg
19713 short tbl_op010_dreg - tbl_op010_dreg
19714 short tbl_op010_dreg - tbl_op010_dreg
19715 short opd_word - tbl_op010_dreg
19716 short tbl_op010_dreg - tbl_op010_dreg
19717 short opd_byte - tbl_op010_dreg
19718 short tbl_op010_dreg - tbl_op010_dreg
19779 fmov.s (%a0), %fp0 # no, so can load it regular
19787 # - src is out in memory. must: #
19788 # (1) calc ea - must read AFTER you know the src type since #
19789 # if the ea is -() or ()+, need to know # of bytes. #
19805 short load_long - tbl_fp_type
19806 short load_sgl - tbl_fp_type
19807 short load_ext - tbl_fp_type
19808 short load_packed - tbl_fp_type
19809 short load_word - tbl_fp_type
19810 short load_dbl - tbl_fp_type
19811 short load_byte - tbl_fp_type
19812 short tbl_fp_type - tbl_fp_type
19816 # -number can't fault #
19852 # -number can't fault #
19888 # -number can't fault #
19924 # -number can't fault #
19983 sub.w %d0, %d1 # exp = 0x3f81 - shft amt.
20006 # -number can't fault #
20069 sub.w %d0, %d1 # exp = 0x3c01 - shft amt.
20095 # -number can't fault #
20127 # -number can't fault #
20153 # _round() - needed to create EXOP for sgl/dbl precision #
20154 # norm() - needed to create EXOP for extended precision #
20155 # ovf_res() - create default overflow result for sgl/dbl precision#
20156 # unf_res() - create default underflow result for sgl/dbl prec. #
20157 # dst_dbl() - create rounded dbl precision result. #
20158 # dst_sgl() - create rounded sgl precision result. #
20159 # fetch_dreg() - fetch dynamic k-factor reg for packed. #
20160 # bindec() - convert FP binary number to packed number. #
20161 # _mem_write() - write data to memory. #
20162 # _mem_write2() - write data to memory unless supv mode -(a7) exc.#
20163 # _dmem_write_{byte,word,long}() - write data to memory. #
20164 # store_dreg_{b,w,l}() - store data to data register file. #
20165 # facc_out_{b,w,l,d,x}() - data access error occurred. #
20189 # For packed, the k-factor must be fetched from the instruction #
20193 # If at any time an access error is flagged by one of the move- #
20194 # to-memory routines, then a special exit must be made so that the #
20207 short fout_long - tbl_fout
20208 short fout_sgl - tbl_fout
20209 short fout_ext - tbl_fout
20210 short fout_pack - tbl_fout
20211 short fout_word - tbl_fout
20212 short fout_dbl - tbl_fout
20213 short fout_byte - tbl_fout
20214 short fout_pack - tbl_fout
20224 bne.b fout_byte_denorm # no
20270 bne.b fout_word_denorm # no
20316 bne.b fout_long_denorm # no
20365 # 16-bit field gets zeroed. we do this since we promise not to disturb
20381 # in the pre-decrement case from supervisor mode or else we'll corrupt
20392 bne.b fout_ext_denorm # no
20413 bne.b fout_ext_denorm # no
20419 neg.w %d0 # new exp = -(shft amt)
20500 mov.l %a0,-(%sp)
20556 mov.l %a0,-(%sp)
20615 fblt.w fout_sgl_exg # no; go finish NORM
20628 bne.b fout_sd_exc_cont # no
20661 beq.b fout_sd_exc_done # no
20716 rts # no; so we're finished
20729 mov.l %a0,-(%sp)
20777 mov.l %a0,-(%sp)
20826 fblt.w fout_dbl_exg # no; go finish NORM
20846 # Note: no attempt is made to round the extended value to double. #
20848 # dbl_exp = ext_exp - $3fff(ext bias) + $7ff(dbl bias) #
20852 # --------------- --------------- --------------- #
20853 # extended -> |s| exp | |1| ms mant | | ls mant | #
20854 # --------------- --------------- --------------- #
20860 # --------------- --------------- #
20861 # double -> |s|exp| mant | | mant | #
20862 # --------------- --------------- #
20873 bmi.b dst_get_dupper # no
20874 subq.w &0x1,%d0 # yes; denorm bias = DBL_BIAS - 1
20913 # sgl_exp = ext_exp - $3fff(ext bias) + $7f(sgl bias) #
20917 # --------------- --------------- --------------- #
20918 # extended -> |s| exp | |1| ms mant | | ls mant | #
20919 # --------------- --------------- --------------- #
20925 # --------------- #
20926 # single -> |s|exp| mant | #
20927 # --------------- #
20938 bmi.b dst_get_supper # no
20939 subq.w &0x1,%d0 # yes; denorm bias = SGL_BIAS - 1
20956 mov.l %a0,-(%sp)
20970 bsr.l fetch_dreg # fetch Dn w/ k-factor
20977 bfexts %d0{&25:&7},%d0 # extract k-factor
20978 mov.l %d0,-(%sp)
20998 # add the extra condition that only if the k-factor was zero, too, should
21003 # algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
21005 # the question now is whether the exponents sign bit is allowed to be non-zero
21044 bra.b fout_pack_write # no
21079 short fdreg0 - tbl_fdreg
21080 short fdreg1 - tbl_fdreg
21081 short fdreg2 - tbl_fdreg
21082 short fdreg3 - tbl_fdreg
21083 short fdreg4 - tbl_fdreg
21084 short fdreg5 - tbl_fdreg
21085 short fdreg6 - tbl_fdreg
21086 short fdreg7 - tbl_fdreg
21087 short fdreg8 - tbl_fdreg
21088 short fdreg9 - tbl_fdreg
21089 short fdrega - tbl_fdreg
21090 short fdregb - tbl_fdreg
21091 short fdregc - tbl_fdreg
21092 short fdregd - tbl_fdreg
21093 short fdrege - tbl_fdreg
21094 short fdregf - tbl_fdreg
21172 short sdregl0 - tbl_sdregl
21173 short sdregl1 - tbl_sdregl
21174 short sdregl2 - tbl_sdregl
21175 short sdregl3 - tbl_sdregl
21176 short sdregl4 - tbl_sdregl
21177 short sdregl5 - tbl_sdregl
21178 short sdregl6 - tbl_sdregl
21179 short sdregl7 - tbl_sdregl
21233 short sdregw0 - tbl_sdregw
21234 short sdregw1 - tbl_sdregw
21235 short sdregw2 - tbl_sdregw
21236 short sdregw3 - tbl_sdregw
21237 short sdregw4 - tbl_sdregw
21238 short sdregw5 - tbl_sdregw
21239 short sdregw6 - tbl_sdregw
21240 short sdregw7 - tbl_sdregw
21294 short sdregb0 - tbl_sdregb
21295 short sdregb1 - tbl_sdregb
21296 short sdregb2 - tbl_sdregb
21297 short sdregb3 - tbl_sdregb
21298 short sdregb4 - tbl_sdregb
21299 short sdregb5 - tbl_sdregb
21300 short sdregb6 - tbl_sdregb
21301 short sdregb7 - tbl_sdregb
21343 # Typically used for an instruction w/ a post-increment <ea>, #
21360 short iareg0 - tbl_iareg
21361 short iareg1 - tbl_iareg
21362 short iareg2 - tbl_iareg
21363 short iareg3 - tbl_iareg
21364 short iareg4 - tbl_iareg
21365 short iareg5 - tbl_iareg
21366 short iareg6 - tbl_iareg
21367 short iareg7 - tbl_iareg
21407 # Typically used for an instruction w/ a pre-decrement <ea>, #
21424 short dareg0 - tbl_dareg
21425 short dareg1 - tbl_dareg
21426 short dareg2 - tbl_dareg
21427 short dareg3 - tbl_dareg
21428 short dareg4 - tbl_dareg
21429 short dareg5 - tbl_dareg
21430 short dareg6 - tbl_dareg
21431 short dareg7 - tbl_dareg
21483 short load_fpn1_0 - tbl_load_fpn1
21484 short load_fpn1_1 - tbl_load_fpn1
21485 short load_fpn1_2 - tbl_load_fpn1
21486 short load_fpn1_3 - tbl_load_fpn1
21487 short load_fpn1_4 - tbl_load_fpn1
21488 short load_fpn1_5 - tbl_load_fpn1
21489 short load_fpn1_6 - tbl_load_fpn1
21490 short load_fpn1_7 - tbl_load_fpn1
21556 short load_fpn2_0 - tbl_load_fpn2
21557 short load_fpn2_1 - tbl_load_fpn2
21558 short load_fpn2_2 - tbl_load_fpn2
21559 short load_fpn2_3 - tbl_load_fpn2
21560 short load_fpn2_4 - tbl_load_fpn2
21561 short load_fpn2_5 - tbl_load_fpn2
21562 short load_fpn2_6 - tbl_load_fpn2
21563 short load_fpn2_7 - tbl_load_fpn2
21613 # d0 = index of floating-point register #
21631 short store_fpreg_0 - tbl_store_fpreg
21632 short store_fpreg_1 - tbl_store_fpreg
21633 short store_fpreg_2 - tbl_store_fpreg
21634 short store_fpreg_3 - tbl_store_fpreg
21635 short store_fpreg_4 - tbl_store_fpreg
21636 short store_fpreg_5 - tbl_store_fpreg
21637 short store_fpreg_6 - tbl_store_fpreg
21638 short store_fpreg_7 - tbl_store_fpreg
21647 fmovm.x &0x01, -(%sp)
21651 fmovm.x &0x01, -(%sp)
21655 fmovm.x &0x01, -(%sp)
21659 fmovm.x &0x01, -(%sp)
21663 fmovm.x &0x01, -(%sp)
21667 fmovm.x &0x01, -(%sp)
21714 # to see if (threshold - exponent) is > 65 in which case we can
21721 sub.w FTEMP_EX(%a0), %d0 # diff = threshold - exp
21727 beq.b denorm_call # no; don't change anything
21776 sub.w FTEMP_EX(%a0), %d1 # d1 = threshold - uns exponent
21785 # No normalization necessary
21797 # ---------------------------------------------------------
21799 # ---------------------------------------------------------
21800 # <-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
21809 # <-(n)-><-(32 - n)-><------(32)-------><------(32)------->
21810 # ---------------------------------------------------------
21812 # ---------------------------------------------------------
21815 mov.l %d2, -(%sp) # create temp storage
21819 sub.w %d1, %d0 # %d0 = 32 - %d1
21822 blt.b case1_extract # no; no fix needed
21835 beq.b case1_sticky_clear # no; go finish
21849 # ---------------------------------------------------------
21851 # ---------------------------------------------------------
21852 # <-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
21855 # \ \ -------------------
21856 # \ -------------------- \
21857 # ------------------- \ \
21861 # <-------(32)------><-(n)-><-(32 - n)-><------(32)------->
21862 # ---------------------------------------------------------
21864 # ---------------------------------------------------------
21867 mov.l %d2, -(%sp) # create temp storage
21872 sub.w %d1, %d0 # %d0 = 32 - %d1
21876 # it only plays a role in shift amounts of 61-63.
21913 blt.b case3_64 # no; it's == 64
21914 beq.b case3_65 # no; it's == 65
21930 # ---------------------------------------------------------
21932 # ---------------------------------------------------------
21933 # <-------(32)------>
21937 # \ ------------------------------
21938 # ------------------------------- \
21942 # <-------(32)------>
21943 # ---------------------------------------------------------
21945 # ---------------------------------------------------------
21958 # ---------------------------------------------------------
21960 # ---------------------------------------------------------
21961 # <-------(32)------>
21965 # \ ------------------------------
21966 # -------------------------------- \
21970 # <-------(31)----->
21971 # ---------------------------------------------------------
21973 # ---------------------------------------------------------
21978 lsr.l &0x1, %d0 # shift high bit into R bit
21991 # no bits were shifted off so don't set the sticky bit.
22034 # a0 is preserved and the g-r-s bits in d0 are cleared. #
22035 # The result is not typed - the tag field is invalid. The #
22039 # inexact (i.e. if any of the g-r-s bits were set). #
22066 short rnd_near - tbl_mode
22067 short truncate - tbl_mode # RZ always truncates
22068 short rnd_mnus - tbl_mode
22069 short rnd_plus - tbl_mode
22085 bgt.w add_dbl # no; it's dbl
22086 bra.w add_ext # no; it's ext
22102 bgt.w add_dbl # no; it's dbl
22103 bra.w add_ext # no; it's ext
22112 asl.l &0x1, %d0 # shift g-bit to c-bit
22119 bgt.w add_dbl # no; it's dbl
22120 bra.w add_ext # no; it's ext
22123 set ad_1_sgl, 0x00000100 # constant to add 1 to l-bit in sgl prec
22124 set ad_1_dbl, 0x00000800 # constant to add 1 to l-bit in dbl prec
22131 bcc.b scc_clr # no mantissa overflow
22132 roxr.w FTEMP_HI(%a0) # shift v-bit back in
22133 roxr.w FTEMP_HI+2(%a0) # shift v-bit back in
22138 and.w &0xfe00, FTEMP_HI+2(%a0) # clear the l-bit
22148 addq.l &1,FTEMP_LO(%a0) # add 1 to l-bit
22152 roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
22153 roxr.w FTEMP_HI+2(%a0) # mant is 0 so restore v-bit
22169 bcc.b dcc_clr # no carry
22171 bcc.b dcc_clr # no carry
22173 roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
22174 roxr.w FTEMP_HI+2(%a0) # mant is 0 so restore v-bit
22181 and.w &0xf000, FTEMP_LO+2(%a0) # clear the l-bit
22195 bgt.b dbl_done # no; it's dbl
22196 rts # no; it's ext
22223 bne.b ext_grs_not_ext # no; go handle sgl or dbl
22234 movm.l &0x3000, -(%sp) # make some temp registers {d2/d3}
22237 bne.b ext_grs_dbl # no; go handle dbl
22242 # -----------------------------------------------------
22244 # -----------------------------------------------------
22245 # <--(24)--->nn\ /
22246 # ee ---------------------
22252 bfextu FTEMP_HI(%a0){&24:&2}, %d3 # sgl prec. g-r are 2 bits right
22254 lsl.l %d2, %d3 # shift g-r bits to MSB of d3
22255 mov.l FTEMP_HI(%a0), %d2 # get word 2 for s-bit test
22257 bne.b ext_grs_st_stky # bits to the right of g-r
22267 # -----------------------------------------------------
22269 # -----------------------------------------------------
22271 # ee -------
22277 bfextu FTEMP_LO(%a0){&21:&2}, %d3 # dbl-prec. g-r are 2 bits right
22279 lsl.l %d2, %d3 # shift g-r bits to the MSB of d3
22280 mov.l FTEMP_LO(%a0), %d2 # get lower mantissa for s-bit test
22281 and.l &0x000001ff, %d2 # s bit is the or-ing of all
22282 bne.b ext_grs_st_stky # other bits to the right of g-r
22318 mov.l %d2, -(%sp) # create some temp regs
22319 mov.l %d3, -(%sp)
22360 # unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO #
22361 # - returns corresponding optype tag #
22367 # norm() - normalize the mantissa #
22373 # d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO #
22391 add.w &32, %d0 # no; fix shift distance
22423 bgt.b unnorm_nrm_zero_lrg # no; go handle large exponent
22478 # Simply test the exponent, j-bit, and mantissa values to #
22558 # Simply test the exponent, j-bit, and mantissa values to #
22621 # Simply test the exponent, j-bit, and mantissa values to #
22674 # _denorm() - denormalize according to scale factor #
22675 # _round() - round denormalized number according to rnd prec #
22701 mov.l %d1, -(%sp) # save rnd prec,mode on stack
22711 mov.l %a0, -(%sp) # save operand ptr during calls
22733 beq.b unf_res_chkifzero # no; result is positive
22741 bne.b unf_res_cont # no
22743 bne.b unf_res_cont # no
22755 beq.b unf_res_end # no
22765 mov.l %d1,-(%sp) # save rnd prec,mode on stack
22775 mov.l %a0,-(%sp) # save operand ptr during calls
22793 beq.b unf_res4_chkifzero # no; result is positive
22801 bne.b unf_res4_cont # no
22803 bne.b unf_res4_cont # no
22815 beq.b unf_res4_end # no
22833 # d1.b = '-1' => (-); '0' => (+) #
22912 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22913 long 0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RZ
22914 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22915 long 0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RP
22917 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22918 long 0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RZ
22919 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22920 long 0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RP
22922 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22923 long 0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RZ
22924 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22925 long 0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RP
22930 # convert it to a floating-point binary number. #
22933 # _dcalc_ea() - calculate the correct <ea> #
22934 # _mem_read() - fetch the packed operand from memory #
22935 # facc_in_x() - the fetch failed so jump to special exit code #
22936 # decbin() - convert packed to binary extended precision #
22942 # If no failure on _mem_read(): #
22947 # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
22956 # the stacked <ea> for packed is correct except for -(An).
22957 # the base reg must be updated for both -(An) and (An)+.
22973 bne.b gp_try_zero # no
22995 # a0 to extended-precision value in fp0. #
23004 # Expected is a normal bcd (i.e. non-exceptional; all inf, zero, #
23017 # assumed following the least-significant digit. #
23027 # SM = 0 a non-zero digit in the integer position #
23028 # SM = 1 a non-zero digit in Mant0, lsd of the fraction #
23031 # representation (ex. 0.1E2, 1E1, 10E0, 100E-1), is converted #
23054 # 10**{1,2,4,8,16,32,64,128,256,512,1024,2048,4096}. No rounding
23078 movm.l &0x3c00,-(%sp) # save d2-d5
23079 fmovm.x &0x1,-(%sp) # save fp1
23122 mov.l %d1,-(%sp) # save exp on stack
23200 # 3. Add one for each zero encountered until a non-zero digit.
23207 # 3. Add one for each zero encountered until a non-zero digit.
23212 # *Why 27? If the adjusted exponent is within -28 < expA < 28, than
23215 # of 27 or less are exact, there is no need to use this routine to
23234 # and do append (+) or strip (-) zeros accordingly.
23246 bne.b ap_p_fx # if M16 is non-zero, go fix exp
23259 bne.b ap_p_fx # if non-zero, go to fix exp
23277 lea.l PTENRN(%pc),%a1 # get address of power-of-ten table
23307 bne.b ap_n_fx # if non-zero, go to exp fix
23325 lea.l PTENRN(%pc),%a1 # get address of power-of-ten table
23340 # Calculate power-of-ten factor from adjusted and shifted exponent.
23357 # (*) fp1: power-of-ten accumulator
23367 # - + RP RM
23368 # + - RP RM
23369 # - - RP RP
23372 # - + RM RP
23373 # + - RM RP
23374 # - - RM RM
23377 # - + RZ RM
23378 # + - RZ RP
23379 # - - RZ RP
23391 clr.l %d3 # clear d3 to force no exc and extended
23431 # ( ) fp1: scaling factor - 10**(abs(exp))
23451 beq.b no_exc # skip this if no exc
23456 movm.l (%sp)+,&0x3c # restore d2-d5
23468 # d0 = contains the k-factor sign-extended to 32-bits. #
23476 # The k-factor is saved for use in d7. Clear the #
23498 # k-factor can dictate either the total number of digits, #
23520 # A9. Scale X -> Y. #
23527 # compensated for by 'or-ing' in the INEX2 flag to #
23540 # or less than LEN -1 digits, adjust ILOG and repeat from #
23593 # d2: upper 32-bits of mantissa for binstr
23594 # d3: scratch;lower 32-bits of mantissa for binstr
23598 # d7: k-factor
23612 movm.l &0x3f20,-(%sp) # {%d2-%d7/%a2}
23613 fmovm.x &0x7,-(%sp) # {%fp0-%fp2}
23616 # The k-factor is saved for use in d7. Clear BINDEC_FLG for
23624 mov.l %d0,%d7 # move k-factor to d7
23628 bne.w A2_str # no; input is a NORM
23665 # ILOG is the log base 10 of the input value. It is approx-
23672 # d0: k-factor/exponent
23678 # d7: k-factor/Unchanged
23692 mov.l &-4933,%d6 # force ILOG = -4933
23714 fmov.l &0,%fpsr # zero all of fpsr - nothing needed
23724 # LEN is the number of digits to be displayed. The k-factor
23740 # d7: k-factor/Unchanged
23754 ble.b k_neg # if k <= 0, LEN = ILOG + 1 - k
23781 # Coonen, p. 7.23 as ref.; however, the SCALE variable is
23786 # ----------------------------------------------
23806 # d0: exponent/scratch - final is 0
23808 # d3: x/scratch - offset ptr into PTENRM array
23812 # d7: k-factor/Unchanged
23827 cmp.l %d7,%d6 # test k - ILOG
23831 mov.l %d6,%d0 # calc ILOG + 1 - LEN in d0
23840 cmp.l %d0,&0xffffecd4 # test iscale <= -4908
23895 # A9. Scale X -> Y.
23915 # d7: k-factor/Unchanged
23932 fdiv.x %fp1,%fp0 # calculate X / SCALE -> Y to fp0
23945 fmovm.x &0x2,-(%sp) # save 10^ISCALE to stack
23962 mov.l 0x8(%a0),-(%sp) # put input op mantissa on stk
23963 mov.l 0x4(%a0),-(%sp)
23964 mov.l &0x3fff0000,-(%sp) # force exp to zero
23970 mov.l 36+8(%a1),-(%sp) # get 10^8 mantissa
23971 mov.l 36+4(%a1),-(%sp)
23972 mov.l &0x3fff0000,-(%sp) # force exp to zero
23973 mov.l 48+8(%a1),-(%sp) # get 10^16 mantissa
23974 mov.l 48+4(%a1),-(%sp)
23975 mov.l &0x3fff0000,-(%sp)# force exp to zero
23989 fmul.x %fp1,%fp0 # calculate X * SCALE -> Y to fp0
23993 # for by 'or-ing' in the INEX2 flag to the lsb of Y.
24003 # d7: k-factor/Unchanged
24044 # d7: k-factor/Unchanged
24048 # a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
24058 movm.l &0xc0c0,-(%sp) # save regs used by sintd0 {%d0-%d1/%a0-%a1}
24059 mov.l L_SCR1(%a6),-(%sp)
24060 mov.l L_SCR2(%a6),-(%sp)
24066 or.l &0x80000000,(%a0) # if neg, use -Y
24068 mov.l USER_FPSR(%a6),-(%sp)
24088 movm.l (%sp)+,&0x303 # restore regs used by sint {%d0-%d1/%a0-%a1}
24095 # or less than LEN -1 digits, adjust ILOG and repeat from
24100 # in extended precision, so the use of a previous power-of-ten
24101 # table will introduce no error.
24112 # d7: k-factor/Unchanged
24127 bne not_zr # if non-zero, go to second test
24129 # Compute 10^(LEN-1)
24133 subq.l &1,%d0 # d0 = LEN -1
24144 # 10^LEN-1 is computed for this test and A14. If the input was
24152 # Compare abs(YINT) to 10^(LEN-1) and 10^LEN
24156 fcmp.x %fp0,%fp2 # compare abs(YINT) with 10^(LEN-1)
24213 # d0: x/LEN call to binstr - final is 0
24215 # d2: x/ms 32-bits of mant of abs(YINT)
24216 # d3: x/ls 32-bits of mant of abs(YINT)
24220 # d7: k-factor/Unchanged
24276 # -----------------------------------------
24278 # -----------------------------------------
24281 # is non-zero, OPERR is signaled. In all cases, all 4 digits are
24286 # d0: x/LEN call to binstr - final is 0
24288 # d2: x/ms 32-bits of exp fraction/scratch
24289 # d3: x/ls 32-bits of exp fraction
24293 # d7: k-factor/Unchanged
24309 fbeq.w den_zero # if zero, use k-factor or 4933
24314 tst.l %d7 # check sign of the k-factor
24367 # d0: x/scratch - final is x
24373 # d7: k-factor/Unchanged
24401 fmovm.x (%sp)+,&0xe0 # {%fp0-%fp2}
24402 movm.l (%sp)+,&0x4fc # {%d2-%d7/%a2}
24454 # binstr(): Converts a 64-bit binary integer to bcd. #
24457 # d2:d3 = 64-bit binary integer #
24464 # a0 = pointer to LEN bcd digits representing the 64-bit integer. #
24467 # The 64-bit binary is assumed to have a decimal point before #
24480 # A3. Multiply the fraction in d2:d3 by 8 using bit-field #
24486 # A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5 #
24489 # A6. Test d7. If zero, the digit formed is the ms digit. If non- #
24504 # d2: upper 32-bits of fraction for mul by 8
24505 # d3: lower 32-bits of fraction for mul by 8
24506 # d4: upper 32-bits of fraction for mul by 2
24507 # d5: lower 32-bits of fraction for mul by 2
24508 # d6: temp for bit-field extracts
24515 movm.l &0xff00,-(%sp) # {%d0-%d7}
24556 beq.b first_d # if non-zero, form byte & write
24563 clr.w %d7 # set d7a to signal no digits done
24579 movm.l (%sp)+,&0xff # {%d0-%d7}
24597 # _real_access() - exit through access error handler #
24610 # -(an)+ register gets returned to its pre-exception value and then #
24691 fmovm.x EXC_FPREGS(%a6),&0xc0 # restore fp0-fp1
24693 movm.l EXC_DREGS(%a6),&0x0303 # restore d0-d1/a0-a1
24697 mov.l (%sp),-(%sp) # store SR, hi(PC)
24714 # the emulation has already changed its value to the correct post-
24716 # handler, then AN must be returned to its pre-instruction value.
24735 short ri_a0 - tbl_rest_inc
24736 short ri_a1 - tbl_rest_inc
24737 short ri_a2 - tbl_rest_inc
24738 short ri_a3 - tbl_rest_inc
24739 short ri_a4 - tbl_rest_inc
24740 short ri_a5 - tbl_rest_inc
24741 short ri_a6 - tbl_rest_inc
24742 short ri_a7 - tbl_rest_inc