Lines Matching +full:imx1 +full:- +full:ccm

1 // SPDX-License-Identifier: GPL-2.0
3  *	m5441x.c -- support for Coldfire m5441x processors
24 DEFINE_CLK(0, "imx1-i2c.1", 14, MCF_CLK);
30 DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
31 DEFINE_CLK(0, "fsl-dspi.0", 23, MCF_CLK);
49 DEFINE_CLK(0, "mcfusb-otg.0", 44, MCF_CLK);
50 DEFINE_CLK(0, "mcfusb-host.0", 45, MCF_CLK);
51 DEFINE_CLK(0, "mcfddr-sram.0", 46, MCF_CLK);
56 DEFINE_CLK(0, "sdhci-esdhc-mcf.0", 51, MCF_CLK);
57 DEFINE_CLK(0, "enet-fec.0", 53, MCF_CLK);
58 DEFINE_CLK(0, "enet-fec.1", 54, MCF_CLK);
64 DEFINE_CLK(1, "imx1-i2c.2", 4, MCF_CLK);
65 DEFINE_CLK(1, "imx1-i2c.3", 5, MCF_CLK);
66 DEFINE_CLK(1, "imx1-i2c.4", 6, MCF_CLK);
67 DEFINE_CLK(1, "imx1-i2c.5", 7, MCF_CLK);
86 	CLKDEV_INIT("imx1-i2c.1", NULL, &__clk_0_14),
92 	CLKDEV_INIT("imx1-i2c.0", NULL, &__clk_0_22),
93 	CLKDEV_INIT("fsl-dspi.0", NULL, &__clk_0_23),
111 	CLKDEV_INIT("mcfusb-otg.0", NULL, &__clk_0_44),
112 	CLKDEV_INIT("mcfusb-host.0", NULL, &__clk_0_45),
113 	CLKDEV_INIT("mcfddr-sram.0", NULL, &__clk_0_46),
118 	CLKDEV_INIT("sdhci-esdhc-mcf.0", NULL, &__clk_0_51),
119 	CLKDEV_INIT("enet-fec.0", NULL, &__clk_0_53),
120 	CLKDEV_INIT("enet-fec.1", NULL, &__clk_0_54),
125 	CLKDEV_INIT("imx1-i2c.2", NULL, &__clk_1_4),
126 	CLKDEV_INIT("imx1-i2c.3", NULL, &__clk_1_5),
127 	CLKDEV_INIT("imx1-i2c.4", NULL, &__clk_1_6),
128 	CLKDEV_INIT("imx1-i2c.5", NULL, &__clk_1_7),
163 	&__clk_1_36, /* CCM/reset module/Power management */
184 	&__clk_0_53, /* enet-fec */
185 	&__clk_0_54, /* enet-fec */
189 	&__clk_1_2, /* 1-wire */
204 	__raw_writel(__raw_readl(MCFSDHC_CLK) | (1 << clk->slot), MCFSDHC_CLK);  in __clk_enable2()
209 	__raw_writel(__raw_readl(MCFSDHC_CLK) & ~(1 << clk->slot), MCFSDHC_CLK);  in __clk_disable2()