13 void simu_pc(struct pt_regs *regs, union loongarch_instruction insn)  in simu_pc()  argument
15 	unsigned long pc = regs->csr_era;  in simu_pc()
26 		regs->regs[rd] = pc + sign_extend64(imm << 2, 21);  in simu_pc()
29 		regs->regs[rd] = pc + sign_extend64(imm << 12, 31);  in simu_pc()
32 		regs->regs[rd] = pc + sign_extend64(imm << 18, 37);  in simu_pc()
35 		regs->regs[rd] = pc + sign_extend64(imm << 12, 31);  in simu_pc()
36 		regs->regs[rd] &= ~((1 << 12) - 1);  in simu_pc()
43 	regs->csr_era += LOONGARCH_INSN_SIZE;  in simu_pc()
46 void simu_branch(struct pt_regs *regs, union loongarch_instruction insn)  in simu_branch()  argument
49 	unsigned long pc = regs->csr_era;  in simu_branch()
60 		regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 27);  in simu_branch()
63 		regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 27);  in simu_branch()
64 		regs->regs[1] = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
73 		if (regs->regs[rj] == 0)  in simu_branch()
74 			regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 22);  in simu_branch()
76 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
79 		if (regs->regs[rj] != 0)  in simu_branch()
80 			regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 22);  in simu_branch()
82 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
91 		if (regs->regs[rj] == regs->regs[rd])  in simu_branch()
92 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
94 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
97 		if (regs->regs[rj] != regs->regs[rd])  in simu_branch()
98 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
100 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
103 		if ((long)regs->regs[rj] < (long)regs->regs[rd])  in simu_branch()
104 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
106 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
109 		if ((long)regs->regs[rj] >= (long)regs->regs[rd])  in simu_branch()
110 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
112 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
115 		if (regs->regs[rj] < regs->regs[rd])  in simu_branch()
116 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
118 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
121 		if (regs->regs[rj] >= regs->regs[rd])  in simu_branch()
122 			regs->csr_era = pc + sign_extend64(imm << 2, 17);  in simu_branch()
124 			regs->csr_era = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
127 		regs->csr_era = regs->regs[rj] + sign_extend64(imm << 2, 17);  in simu_branch()
128 		regs->regs[rd] = pc + LOONGARCH_INSN_SIZE;  in simu_branch()
173 void arch_simulate_insn(union loongarch_instruction insn, struct pt_regs *regs)  in arch_simulate_insn()  argument
176 		simu_pc(regs, insn);  in arch_simulate_insn()
178 		simu_branch(regs, insn);  in arch_simulate_insn()