Lines Matching full:has
13 * (CPUCFG.00) has the following layout:
75 #define CPU_FEATURE_CPUCFG 0 /* CPU has CPUCFG */
76 #define CPU_FEATURE_LAM 1 /* CPU has Atomic instructions */
78 #define CPU_FEATURE_FPU 3 /* CPU has FPU */
79 #define CPU_FEATURE_LSX 4 /* CPU has LSX (128-bit SIMD) */
80 #define CPU_FEATURE_LASX 5 /* CPU has LASX (256-bit SIMD) */
81 #define CPU_FEATURE_CRC32 6 /* CPU has CRC32 instructions */
82 #define CPU_FEATURE_COMPLEX 7 /* CPU has Complex instructions */
83 #define CPU_FEATURE_CRYPTO 8 /* CPU has Crypto instructions */
84 #define CPU_FEATURE_LVZ 9 /* CPU has Virtualization extension */
85 #define CPU_FEATURE_LBT_X86 10 /* CPU has X86 Binary Translation */
86 #define CPU_FEATURE_LBT_ARM 11 /* CPU has ARM Binary Translation */
87 #define CPU_FEATURE_LBT_MIPS 12 /* CPU has MIPS Binary Translation */
88 #define CPU_FEATURE_TLB 13 /* CPU has TLB */
89 #define CPU_FEATURE_CSR 14 /* CPU has CSR */
90 #define CPU_FEATURE_IOCSR 15 /* CPU has IOCSR */
91 #define CPU_FEATURE_WATCH 16 /* CPU has watchpoint registers */
92 #define CPU_FEATURE_VINT 17 /* CPU has vectored interrupts */
93 #define CPU_FEATURE_CSRIPI 18 /* CPU has CSR-IPI */
94 #define CPU_FEATURE_EXTIOI 19 /* CPU has EXT-IOI */
95 #define CPU_FEATURE_PREFETCH 20 /* CPU has prefetch instructions */
96 #define CPU_FEATURE_PMP 21 /* CPU has perfermance counter */
98 #define CPU_FEATURE_FLATMODE 23 /* CPU has flat mode */
99 #define CPU_FEATURE_EIODECODE 24 /* CPU has EXTIOI interrupt pin decode mode */
100 #define CPU_FEATURE_GUESTID 25 /* CPU has GuestID feature */
101 #define CPU_FEATURE_HYPERVISOR 26 /* CPU has hypervisor (running in VM) */
102 #define CPU_FEATURE_PTW 27 /* CPU has hardware page table walker */
103 #define CPU_FEATURE_LSPW 28 /* CPU has LSPW (lddir/ldpte instructions) */
104 #define CPU_FEATURE_AVECINT 29 /* CPU has AVEC interrupt */