Lines Matching +full:4 +full:kb +full:- +full:page
1 # SPDX-License-Identifier: GPL-2.0
250 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
274 default 4 if PGTABLE_4LEVEL
281 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
284 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
287 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
290 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
293 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
296 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
299 def_bool $(as-instr,hvcl 0)
302 def_bool $(cc-option,-mannotate-tablejump)
306 def_bool $(rustc-option,-Cllvm-args=--loongarch-annotate-tablejump)
313 prompt "Page Table Layout"
317 Allows choosing the page table layout, which is a combination
318 of page size and page table levels. The size of virtual memory
319 address space are determined by the page table layout.
321 config 4KB_3LEVEL
322 bool "4KB with 3 levels"
326 This option selects 4KB page size with 3 level page tables, which
329 config 4KB_4LEVEL
330 bool "4KB with 4 levels"
334 This option selects 4KB page size with 4 level page tables, which
338 bool "16KB with 2 levels"
342 This option selects 16KB page size with 2 level page tables, which
346 bool "16KB with 3 levels"
350 This option selects 16KB page size with 3 level page tables, which
354 bool "64KB with 2 levels"
358 This option selects 64KB page size with 2 level page tables, which
362 bool "64KB with 3 levels"
366 This option selects 64KB page size with 3 level page tables, which
372 string "Built-in kernel command line"
375 are provided at run-time, during boot. However, there are cases
379 When that occurs, it is possible to define a built-in command
386 Choose how the kernel will handle the provided built-in command
392 Prefer the command-line passed by the boot loader if available.
393 Use the built-in command line as fallback in case we get nothing
397 bool "Use built-in to extend bootloader kernel arguments"
399 The built-in command line will be appended to the command-
405 bool "Always use the built-in kernel command string"
407 Always use the built-in command line, even if we get one during
415 bool "Enable built-in dtb in kernel"
423 Built-in DTBs are generic enough and can be used as references.
426 string "Source file for built-in dtb"
459 bool "Multi-Processing support"
465 If you say N here, the kernel will run on uni- and multiprocessor
471 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
476 bool "Support for hot-pluggable CPUs"
487 int "Maximum number of CPUs (2-2048)"
499 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
522 The page size is not necessarily 4KB. Keep this in mind
526 bool "Enable LoongArch DMW-based ioremap()"
528 We use generic TLB-based ioremap() by default since it has page
529 protection support. However, you can enable LoongArch DMW-based
536 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
541 This means WUC can only used for write-only memory regions now, so
549 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
553 -mstrict-align build parameter to prevent unaligned accesses.
556 Loongson-2K2000/2K3000 and all of Loongson-3 series processors
560 Loongson-2K0300/2K0500/2K1000.
607 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
716 for architectures which are either NUMA (Non-Uniform Memory Access)