Lines Matching refs:A64_VARIANT

19 #define A64_VARIANT(sf) \  macro
24 	aarch64_insn_gen_comp_branch_imm(0, offset, Rt, A64_VARIANT(sf), \
157 		A64_VARIANT(sf), AARCH64_INSN_ADSB_##type)
175 		A64_VARIANT(sf), AARCH64_INSN_BITFIELD_MOVE_##type)
203 		A64_VARIANT(sf), AARCH64_INSN_MOVEWIDE_##type)
214 		A64_VARIANT(sf), AARCH64_INSN_ADSB_##type)
226 	A64_VARIANT(sf), AARCH64_INSN_DATA1_##type)
235 	A64_VARIANT(sf), AARCH64_INSN_DATA2_##type)
245 	A64_VARIANT(sf), AARCH64_INSN_DATA3_MADD)
248 	A64_VARIANT(sf), AARCH64_INSN_DATA3_MSUB)
255 		A64_VARIANT(sf), AARCH64_INSN_LOGIC_##type)
271 		A64_VARIANT(sf), Rn, Rd, imm64); \