Lines Matching +full:group +full:- +full:default
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/irqchip/arm-gic-v3.h>
23 return -EEXIST; in vgic_check_iorange()
26 return -EINVAL; in vgic_check_iorange()
29 return -EINVAL; in vgic_check_iorange()
31 if (addr & ~kvm_phys_mask(&kvm->arch.mmu) || in vgic_check_iorange()
32 (addr + size) > kvm_phys_size(&kvm->arch.mmu)) in vgic_check_iorange()
33 return -E2BIG; in vgic_check_iorange()
40 if (kvm->arch.vgic.vgic_model != type_needed) in vgic_check_type()
41 return -ENODEV; in vgic_check_type()
48 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_set_legacy_vgic_v2_addr()
51 mutex_lock(&kvm->arch.config_lock); in kvm_set_legacy_vgic_v2_addr()
52 switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) { in kvm_set_legacy_vgic_v2_addr()
56 r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
59 vgic->vgic_dist_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
64 r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
67 vgic->vgic_cpu_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
69 default: in kvm_set_legacy_vgic_v2_addr()
70 r = -ENODEV; in kvm_set_legacy_vgic_v2_addr()
73 mutex_unlock(&kvm->arch.config_lock); in kvm_set_legacy_vgic_v2_addr()
79 * kvm_vgic_addr - set or get vgic VM base addresses
95 u64 __user *uaddr = (u64 __user *)attr->addr; in kvm_vgic_addr()
96 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_vgic_addr()
103 if (write || attr->attr == KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION) in kvm_vgic_addr()
105 return -EFAULT; in kvm_vgic_addr()
111 mutex_lock(&kvm->slots_lock); in kvm_vgic_addr()
112 switch (attr->attr) { in kvm_vgic_addr()
115 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
121 addr_ptr = &vgic->vgic_cpu_base; in kvm_vgic_addr()
127 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
141 rdreg = list_first_entry_or_null(&vgic->rd_regions, in kvm_vgic_addr()
146 addr_ptr = &rdreg->base; in kvm_vgic_addr()
166 r = -EINVAL; in kvm_vgic_addr()
175 r = -ENOENT; in kvm_vgic_addr()
180 addr |= rdreg->base; in kvm_vgic_addr()
181 addr |= (u64)rdreg->count << KVM_VGIC_V3_RDIST_COUNT_SHIFT; in kvm_vgic_addr()
184 default: in kvm_vgic_addr()
185 r = -ENODEV; in kvm_vgic_addr()
191 mutex_lock(&kvm->arch.config_lock); in kvm_vgic_addr()
199 mutex_unlock(&kvm->arch.config_lock); in kvm_vgic_addr()
202 mutex_unlock(&kvm->slots_lock); in kvm_vgic_addr()
215 switch (attr->group) { in vgic_set_common_attr()
217 r = kvm_vgic_addr(dev->kvm, attr, true); in vgic_set_common_attr()
218 return (r == -ENODEV) ? -ENXIO : r; in vgic_set_common_attr()
220 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_set_common_attr()
225 return -EFAULT; in vgic_set_common_attr()
229 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs in vgic_set_common_attr()
230 * - at most 1024 interrupts in vgic_set_common_attr()
231 * - a multiple of 32 interrupts in vgic_set_common_attr()
236 return -EINVAL; in vgic_set_common_attr()
238 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
243 * supplied a default amount of SPIs. in vgic_set_common_attr()
245 if (dev->kvm->arch.vgic.nr_spis) in vgic_set_common_attr()
246 ret = -EBUSY; in vgic_set_common_attr()
248 dev->kvm->arch.vgic.nr_spis = in vgic_set_common_attr()
249 val - VGIC_NR_PRIVATE_IRQS; in vgic_set_common_attr()
251 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
256 switch (attr->attr) { in vgic_set_common_attr()
258 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
259 r = vgic_init(dev->kvm); in vgic_set_common_attr()
260 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
265 * want to handle all control group attributes in vgic_set_common_attr()
268 if (vgic_check_type(dev->kvm, KVM_DEV_TYPE_ARM_VGIC_V3)) in vgic_set_common_attr()
269 return -ENXIO; in vgic_set_common_attr()
270 mutex_lock(&dev->kvm->lock); in vgic_set_common_attr()
272 if (kvm_trylock_all_vcpus(dev->kvm)) { in vgic_set_common_attr()
273 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
274 return -EBUSY; in vgic_set_common_attr()
277 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
278 r = vgic_v3_save_pending_tables(dev->kvm); in vgic_set_common_attr()
279 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
280 kvm_unlock_all_vcpus(dev->kvm); in vgic_set_common_attr()
281 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
288 return -ENXIO; in vgic_set_common_attr()
294 int r = -ENXIO; in vgic_get_common_attr()
296 switch (attr->group) { in vgic_get_common_attr()
298 r = kvm_vgic_addr(dev->kvm, attr, false); in vgic_get_common_attr()
299 return (r == -ENODEV) ? -ENXIO : r; in vgic_get_common_attr()
301 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_get_common_attr()
303 r = put_user(dev->kvm->arch.vgic.nr_spis + in vgic_get_common_attr()
314 return kvm_vgic_create(dev->kvm, type); in vgic_create()
324 int ret = -ENODEV; in kvm_register_vgic_device()
347 int cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr->attr); in vgic_v2_parse_attr()
349 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v2_parse_attr()
350 reg_attr->vcpu = kvm_get_vcpu_by_id(dev->kvm, cpuid); in vgic_v2_parse_attr()
351 if (!reg_attr->vcpu) in vgic_v2_parse_attr()
352 return -EINVAL; in vgic_v2_parse_attr()
358 * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
368 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v2_attr_regs_access()
384 return -EFAULT; in vgic_v2_attr_regs_access()
386 mutex_lock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
388 if (kvm_trylock_all_vcpus(dev->kvm)) { in vgic_v2_attr_regs_access()
389 mutex_unlock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
390 return -EBUSY; in vgic_v2_attr_regs_access()
393 mutex_lock(&dev->kvm->arch.config_lock); in vgic_v2_attr_regs_access()
395 ret = vgic_init(dev->kvm); in vgic_v2_attr_regs_access()
399 switch (attr->group) { in vgic_v2_attr_regs_access()
406 default: in vgic_v2_attr_regs_access()
407 ret = -EINVAL; in vgic_v2_attr_regs_access()
412 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_v2_attr_regs_access()
413 kvm_unlock_all_vcpus(dev->kvm); in vgic_v2_attr_regs_access()
414 mutex_unlock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
425 switch (attr->group) { in vgic_v2_set_attr()
429 default: in vgic_v2_set_attr()
437 switch (attr->group) { in vgic_v2_get_attr()
441 default: in vgic_v2_get_attr()
449 switch (attr->group) { in vgic_v2_has_attr()
451 switch (attr->attr) { in vgic_v2_has_attr()
463 switch (attr->attr) { in vgic_v2_has_attr()
468 return -ENXIO; in vgic_v2_has_attr()
472 .name = "kvm-arm-vgic-v2",
486 * For KVM_DEV_ARM_VGIC_GRP_DIST_REGS group, in vgic_v3_parse_attr()
489 if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) { in vgic_v3_parse_attr()
490 vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >> in vgic_v3_parse_attr()
494 reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg); in vgic_v3_parse_attr()
496 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0); in vgic_v3_parse_attr()
499 if (!reg_attr->vcpu) in vgic_v3_parse_attr()
500 return -EINVAL; in vgic_v3_parse_attr()
502 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v3_parse_attr()
508 * Allow access to certain ID-like registers prior to VGIC initialization,
513 if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) in reg_allowed_pre_init()
516 switch (attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK) { in reg_allowed_pre_init()
520 default: in reg_allowed_pre_init()
526 * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
550 switch (attr->group) { in vgic_v3_attr_regs_access()
555 default: in vgic_v3_attr_regs_access()
560 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v3_attr_regs_access()
562 return -EFAULT; in vgic_v3_attr_regs_access()
565 mutex_lock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
567 if (kvm_trylock_all_vcpus(dev->kvm)) { in vgic_v3_attr_regs_access()
568 mutex_unlock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
569 return -EBUSY; in vgic_v3_attr_regs_access()
572 mutex_lock(&dev->kvm->arch.config_lock); in vgic_v3_attr_regs_access()
574 if (!(vgic_initialized(dev->kvm) || reg_allowed_pre_init(attr))) { in vgic_v3_attr_regs_access()
575 ret = -EBUSY; in vgic_v3_attr_regs_access()
579 switch (attr->group) { in vgic_v3_attr_regs_access()
592 info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_attr_regs_access()
595 intid = attr->attr & in vgic_v3_attr_regs_access()
600 ret = -EINVAL; in vgic_v3_attr_regs_access()
604 default: in vgic_v3_attr_regs_access()
605 ret = -EINVAL; in vgic_v3_attr_regs_access()
610 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_v3_attr_regs_access()
611 kvm_unlock_all_vcpus(dev->kvm); in vgic_v3_attr_regs_access()
612 mutex_unlock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
615 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v3_attr_regs_access()
625 switch (attr->group) { in vgic_v3_set_attr()
632 u32 __user *uaddr = (u32 __user *)attr->addr; in vgic_v3_set_attr()
636 return -EFAULT; in vgic_v3_set_attr()
638 guard(mutex)(&dev->kvm->arch.config_lock); in vgic_v3_set_attr()
639 if (vgic_initialized(dev->kvm)) in vgic_v3_set_attr()
640 return -EBUSY; in vgic_v3_set_attr()
643 return -EINVAL; in vgic_v3_set_attr()
645 dev->kvm->arch.vgic.mi_intid = val; in vgic_v3_set_attr()
648 default: in vgic_v3_set_attr()
656 switch (attr->group) { in vgic_v3_get_attr()
663 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_v3_get_attr()
665 guard(mutex)(&dev->kvm->arch.config_lock); in vgic_v3_get_attr()
666 return put_user(dev->kvm->arch.vgic.mi_intid, uaddr); in vgic_v3_get_attr()
668 default: in vgic_v3_get_attr()
676 switch (attr->group) { in vgic_v3_has_attr()
678 switch (attr->attr) { in vgic_v3_has_attr()
693 if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_has_attr()
700 switch (attr->attr) { in vgic_v3_has_attr()
707 return -ENXIO; in vgic_v3_has_attr()
711 .name = "kvm-arm-vgic-v3",