Lines Matching refs:Op2
507 switch (p->Op2) { in access_gic_sgi()
663 switch (rd->Op2) { in demux_wb_reg()
924 pmceid = kvm_pmu_get_pmceid(vcpu, (p->Op2 & 1)); in access_pmceid()
952 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 0) in get_pmu_evcntr()
957 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in get_pmu_evcntr()
970 if (r->Op2 == 2) { in access_pmu_evcntr()
977 } else if (r->Op2 == 0) { in access_pmu_evcntr()
995 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
1024 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
1029 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
1065 set = r->Op2 & 1; in set_pmreg()
1096 if (r->Op2 & 0x1) in access_pmcnten()
1122 if (r->Op2 & 0x1) in access_pminten()
2316 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
3136 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e01()
3146 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e2()
3163 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s12()
3189 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_alle1is()
3211 u8 Op2 = sys_reg_Op2(instr); in kvm_supported_tlbi_ipas2_op() local
3217 if (CRm == TLBI_CRm_IPAIS && (Op2 == 2 || Op2 == 6) && in kvm_supported_tlbi_ipas2_op()
3221 if (CRm == TLBI_CRm_IPAONS && (Op2 == 0 || Op2 == 4) && in kvm_supported_tlbi_ipas2_op()
3225 if (CRm == TLBI_CRm_IPAONS && (Op2 == 3 || Op2 == 7) && in kvm_supported_tlbi_ipas2_op()
3281 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_vmalls12e1is()
3305 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ripas2e1is()
3380 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ipas2e1is()
3406 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_tlbi_el1()
3643 { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), \
3646 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_dbg_wb_reg, NULL, n }, \
3648 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_dbg_wb_reg, NULL, n }, \
3650 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_dbg_wb_reg, NULL, n }
3653 { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), \
3663 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgdidr },
3665 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },
3669 { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
3672 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug_regs, NULL, MDCCINT_EL1 },
3674 { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug_regs, NULL, MDSCR_EL1 },
3677 { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
3679 { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi },
3684 { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi },
3686 { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
3689 { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug_regs, NULL, DBGVCR32_EL2 },
3701 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi },
3705 { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_oslar_el1 },
3708 { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1, NULL, OSLSR_EL1 },
3712 { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi },
3715 { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi },
3729 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi },
3732 { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi },
3734 { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi },
3736 { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi },
3738 { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi },
3740 { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi },
3742 { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 },
3756 Op1(_Op1), CRn(_CRn), CRm(_CRm), Op2(_Op2), \
3776 { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr },
3777 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },
3779 { AA32(LO), Op1( 0), CRn( 1), CRm( 0), Op2( 1), access_actlr, NULL, ACTLR_EL1 },
3781 { AA32(HI), Op1( 0), CRn( 1), CRm( 0), Op2( 3), access_actlr, NULL, ACTLR_EL1 },
3782 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
3783 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },
3785 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
3787 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
3788 { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, DACR32_EL2 },
3791 { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1 },
3792 { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, IFSR32_EL2 },
3794 { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1 },
3796 { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1 },
3798 { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, FAR_EL1 },
3800 { AA32(HI), Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, FAR_EL1 },
3805 { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw },
3806 { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw },
3807 { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw },
3831 { AA32(LO), Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, MAIR_EL1 },
3833 { AA32(HI), Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, MAIR_EL1 },
3835 { AA32(LO), Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, AMAIR_EL1 },
3837 { AA32(HI), Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, AMAIR_EL1 },
3862 { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, CONTEXTIDR_EL1 },
3935 { Op1(1), CRn( 0), CRm( 0), Op2(0), access_ccsidr },
3936 { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr },
3939 { Op1(1), CRn( 0), CRm( 0), Op2(2), undef_access },
3941 { Op1(2), CRn( 0), CRm( 0), Op2(0), access_csselr, NULL, CSSELR_EL1 },
3945 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
3947 { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */
3949 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
3950 { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */
3952 { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */
4086 params.Op2 = 0; in kvm_handle_cp_64()
4141 params->Op2 = 0; in kvm_esr_cp10_id_to_sys64()
4145 params->Op2 = 1; in kvm_esr_cp10_id_to_sys64()
4149 params->Op2 = 2; in kvm_esr_cp10_id_to_sys64()
4540 params->Op2 = ((id & KVM_REG_ARM64_SYSREG_OP2_MASK) in index_to_params()
4805 (reg->Op2 << KVM_REG_ARM64_SYSREG_OP2_SHIFT)); in sys_reg_to_index()