Lines Matching full:sys_desc
1478 { SYS_DESC(SYS_DBGBVRn_EL1(n)), \
1481 { SYS_DESC(SYS_DBGBCRn_EL1(n)), \
1484 { SYS_DESC(SYS_DBGWVRn_EL1(n)), \
1487 { SYS_DESC(SYS_DBGWCRn_EL1(n)), \
1492 SYS_DESC(SYS_##name), .reset = reset_pmu_reg, \
1509 #define AMU_AMEVCNTR0_EL0(n) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), undef_access }
1510 #define AMU_AMEVTYPER0_EL0(n) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), undef_access }
1511 #define AMU_AMEVCNTR1_EL0(n) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), undef_access }
1512 #define AMU_AMEVTYPER1_EL0(n) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), undef_access }
1527 { SYS_DESC(SYS_## k), undef_access, reset_unknown, k, \
2616 SYS_DESC(SYS_##name), \
2659 SYS_DESC(SYS_##name), \
2705 SYS_DESC(SYS_##name), \
3173 SYS_DESC(SYS_##reg), \
3201 { SYS_DESC(SYS_MDCCINT_EL1), trap_debug_regs, reset_val, MDCCINT_EL1, 0 },
3202 { SYS_DESC(SYS_MDSCR_EL1), trap_debug_regs, reset_val, MDSCR_EL1, 0 },
3218 { SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
3219 { SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
3220 { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
3222 { SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
3223 { SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
3224 { SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },
3225 { SYS_DESC(SYS_DBGCLAIMCLR_EL1), trap_raz_wi },
3226 { SYS_DESC(SYS_DBGAUTHSTATUS_EL1), trap_dbgauthstatus_el1 },
3228 { SYS_DESC(SYS_MDCCSR_EL0), trap_raz_wi },
3229 { SYS_DESC(SYS_DBGDTR_EL0), trap_raz_wi },
3231 { SYS_DESC(SYS_DBGDTRTX_EL0), trap_raz_wi },
3233 { SYS_DESC(SYS_DBGVCR32_EL2), undef_access, reset_val, DBGVCR32_EL2, 0 },
3236 { SYS_DESC(SYS_MPIDR_EL1), NULL, reset_mpidr, MPIDR_EL1 },
3248 { SYS_DESC(SYS_ID_DFR0_EL1),
3380 { SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },
3381 { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 },
3382 { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 },
3383 { SYS_DESC(SYS_SCTLR2_EL1), access_vm_reg, reset_val, SCTLR2_EL1, 0,
3389 { SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility },
3390 { SYS_DESC(SYS_TRFCR_EL1), undef_access },
3391 { SYS_DESC(SYS_SMPRI_EL1), undef_access },
3392 { SYS_DESC(SYS_SMCR_EL1), undef_access },
3393 { SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 },
3394 { SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },
3395 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
3396 { SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0,
3405 { SYS_DESC(SYS_SPSR_EL1), access_spsr},
3406 { SYS_DESC(SYS_ELR_EL1), access_elr},
3408 { SYS_DESC(SYS_ICC_PMR_EL1), undef_access },
3410 { SYS_DESC(SYS_AFSR0_EL1), access_vm_reg, reset_unknown, AFSR0_EL1 },
3411 { SYS_DESC(SYS_AFSR1_EL1), access_vm_reg, reset_unknown, AFSR1_EL1 },
3412 { SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },
3414 { SYS_DESC(SYS_ERRIDR_EL1), access_ras },
3415 { SYS_DESC(SYS_ERRSELR_EL1), access_ras },
3416 { SYS_DESC(SYS_ERXFR_EL1), access_ras },
3417 { SYS_DESC(SYS_ERXCTLR_EL1), access_ras },
3418 { SYS_DESC(SYS_ERXSTATUS_EL1), access_ras },
3419 { SYS_DESC(SYS_ERXADDR_EL1), access_ras },
3420 { SYS_DESC(SYS_ERXPFGF_EL1), access_ras },
3421 { SYS_DESC(SYS_ERXPFGCTL_EL1), access_ras },
3422 { SYS_DESC(SYS_ERXPFGCDN_EL1), access_ras },
3423 { SYS_DESC(SYS_ERXMISC0_EL1), access_ras },
3424 { SYS_DESC(SYS_ERXMISC1_EL1), access_ras },
3425 { SYS_DESC(SYS_ERXMISC2_EL1), access_ras },
3426 { SYS_DESC(SYS_ERXMISC3_EL1), access_ras },
3431 { SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 },
3432 { SYS_DESC(SYS_PAR_EL1), NULL, reset_unknown, PAR_EL1 },
3434 { SYS_DESC(SYS_PMSCR_EL1), undef_access },
3435 { SYS_DESC(SYS_PMSNEVFR_EL1), undef_access },
3436 { SYS_DESC(SYS_PMSICR_EL1), undef_access },
3437 { SYS_DESC(SYS_PMSIRR_EL1), undef_access },
3438 { SYS_DESC(SYS_PMSFCR_EL1), undef_access },
3439 { SYS_DESC(SYS_PMSEVFR_EL1), undef_access },
3440 { SYS_DESC(SYS_PMSLATFR_EL1), undef_access },
3441 { SYS_DESC(SYS_PMSIDR_EL1), undef_access },
3442 { SYS_DESC(SYS_PMBLIMITR_EL1), undef_access },
3443 { SYS_DESC(SYS_PMBPTR_EL1), undef_access },
3444 { SYS_DESC(SYS_PMBSR_EL1), undef_access },
3445 { SYS_DESC(SYS_PMSDSFR_EL1), undef_access },
3454 { SYS_DESC(SYS_PMMIR_EL1), trap_raz_wi },
3456 { SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },
3457 { SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1,
3459 { SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1,
3461 { SYS_DESC(SYS_POR_EL1), NULL, reset_unknown, POR_EL1,
3463 { SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 },
3465 { SYS_DESC(SYS_LORSA_EL1), trap_loregion },
3466 { SYS_DESC(SYS_LOREA_EL1), trap_loregion },
3467 { SYS_DESC(SYS_LORN_EL1), trap_loregion },
3468 { SYS_DESC(SYS_LORC_EL1), trap_loregion },
3469 { SYS_DESC(SYS_MPAMIDR_EL1), undef_access },
3470 { SYS_DESC(SYS_LORID_EL1), trap_loregion },
3472 { SYS_DESC(SYS_MPAM1_EL1), undef_access },
3473 { SYS_DESC(SYS_MPAM0_EL1), undef_access },
3474 { SYS_DESC(SYS_MPAMSM_EL1), undef_access },
3476 { SYS_DESC(SYS_VBAR_EL1), access_rw, reset_val, VBAR_EL1, 0 },
3477 { SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 },
3479 { SYS_DESC(SYS_ICC_IAR0_EL1), undef_access },
3480 { SYS_DESC(SYS_ICC_EOIR0_EL1), undef_access },
3481 { SYS_DESC(SYS_ICC_HPPIR0_EL1), undef_access },
3482 { SYS_DESC(SYS_ICC_BPR0_EL1), undef_access },
3483 { SYS_DESC(SYS_ICC_AP0R0_EL1), undef_access },
3484 { SYS_DESC(SYS_ICC_AP0R1_EL1), undef_access },
3485 { SYS_DESC(SYS_ICC_AP0R2_EL1), undef_access },
3486 { SYS_DESC(SYS_ICC_AP0R3_EL1), undef_access },
3487 { SYS_DESC(SYS_ICC_AP1R0_EL1), undef_access },
3488 { SYS_DESC(SYS_ICC_AP1R1_EL1), undef_access },
3489 { SYS_DESC(SYS_ICC_AP1R2_EL1), undef_access },
3490 { SYS_DESC(SYS_ICC_AP1R3_EL1), undef_access },
3491 { SYS_DESC(SYS_ICC_IDR0_EL1), access_gicv5_idr0 },
3492 { SYS_DESC(SYS_ICC_IAFFIDR_EL1), access_gicv5_iaffid },
3493 { SYS_DESC(SYS_ICC_PPI_ENABLER0_EL1), access_gicv5_ppi_enabler },
3494 { SYS_DESC(SYS_ICC_PPI_ENABLER1_EL1), access_gicv5_ppi_enabler },
3495 { SYS_DESC(SYS_ICC_DIR_EL1), access_gic_dir },
3496 { SYS_DESC(SYS_ICC_RPR_EL1), undef_access },
3497 { SYS_DESC(SYS_ICC_SGI1R_EL1), access_gic_sgi },
3498 { SYS_DESC(SYS_ICC_ASGI1R_EL1), access_gic_sgi },
3499 { SYS_DESC(SYS_ICC_SGI0R_EL1), access_gic_sgi },
3500 { SYS_DESC(SYS_ICC_IAR1_EL1), undef_access },
3501 { SYS_DESC(SYS_ICC_EOIR1_EL1), undef_access },
3502 { SYS_DESC(SYS_ICC_HPPIR1_EL1), undef_access },
3503 { SYS_DESC(SYS_ICC_BPR1_EL1), undef_access },
3504 { SYS_DESC(SYS_ICC_CTLR_EL1), undef_access },
3505 { SYS_DESC(SYS_ICC_SRE_EL1), access_gic_sre },
3506 { SYS_DESC(SYS_ICC_IGRPEN0_EL1), undef_access },
3507 { SYS_DESC(SYS_ICC_IGRPEN1_EL1), undef_access },
3509 { SYS_DESC(SYS_CONTEXTIDR_EL1), access_vm_reg, reset_val, CONTEXTIDR_EL1, 0 },
3510 { SYS_DESC(SYS_TPIDR_EL1), NULL, reset_unknown, TPIDR_EL1 },
3512 { SYS_DESC(SYS_ACCDATA_EL1), undef_access },
3514 { SYS_DESC(SYS_SCXTNUM_EL1), undef_access },
3516 { SYS_DESC(SYS_CNTKCTL_EL1), NULL, reset_val, CNTKCTL_EL1, 0},
3518 { SYS_DESC(SYS_CCSIDR_EL1), access_ccsidr },
3519 { SYS_DESC(SYS_CLIDR_EL1), access_clidr, reset_clidr, CLIDR_EL1,
3522 { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },
3529 { SYS_DESC(SYS_SVCR), undef_access, reset_val, SVCR, 0, .visibility = sme_visibility },
3530 { SYS_DESC(SYS_FPMR), undef_access, reset_val, FPMR, 0, .visibility = fp8_visibility },
3574 { SYS_DESC(SYS_POR_EL0), NULL, reset_unknown, POR_EL0,
3576 { SYS_DESC(SYS_TPIDR_EL0), NULL, reset_unknown, TPIDR_EL0 },
3577 { SYS_DESC(SYS_TPIDRRO_EL0), NULL, reset_unknown, TPIDRRO_EL0 },
3578 { SYS_DESC(SYS_TPIDR2_EL0), undef_access },
3580 { SYS_DESC(SYS_SCXTNUM_EL0), undef_access },
3582 { SYS_DESC(SYS_AMCR_EL0), undef_access },
3583 { SYS_DESC(SYS_AMCFGR_EL0), undef_access },
3584 { SYS_DESC(SYS_AMCGCR_EL0), undef_access },
3585 { SYS_DESC(SYS_AMUSERENR_EL0), undef_access },
3586 { SYS_DESC(SYS_AMCNTENCLR0_EL0), undef_access },
3587 { SYS_DESC(SYS_AMCNTENSET0_EL0), undef_access },
3588 { SYS_DESC(SYS_AMCNTENCLR1_EL0), undef_access },
3589 { SYS_DESC(SYS_AMCNTENSET1_EL0), undef_access },
3655 { SYS_DESC(SYS_CNTPCT_EL0), .access = access_arch_timer,
3657 { SYS_DESC(SYS_CNTVCT_EL0), .access = access_arch_timer,
3659 { SYS_DESC(SYS_CNTPCTSS_EL0), access_arch_timer },
3660 { SYS_DESC(SYS_CNTVCTSS_EL0), access_arch_timer },
3661 { SYS_DESC(SYS_CNTP_TVAL_EL0), access_arch_timer },
3665 { SYS_DESC(SYS_CNTV_TVAL_EL0), access_arch_timer },
3770 { SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },
3781 { SYS_DESC(SYS_SP_EL1), access_sp_el1},
3784 { SYS_DESC(SYS_SPSR_irq), .access = trap_raz_wi },
3785 { SYS_DESC(SYS_SPSR_abt), .access = trap_raz_wi },
3786 { SYS_DESC(SYS_SPSR_und), .access = trap_raz_wi },
3787 { SYS_DESC(SYS_SPSR_fiq), .access = trap_raz_wi },
3789 { SYS_DESC(SYS_IFSR32_EL2), undef_access, reset_unknown, IFSR32_EL2 },
3794 { SYS_DESC(SYS_FPEXC32_EL2), undef_access, reset_val, FPEXC32_EL2, 0x700 },
3807 { SYS_DESC(SYS_MPAMHCR_EL2), undef_access },
3808 { SYS_DESC(SYS_MPAMVPMV_EL2), undef_access },
3809 { SYS_DESC(SYS_MPAM2_EL2), undef_access },
3810 { SYS_DESC(SYS_MPAMVPM0_EL2), undef_access },
3811 { SYS_DESC(SYS_MPAMVPM1_EL2), undef_access },
3812 { SYS_DESC(SYS_MPAMVPM2_EL2), undef_access },
3813 { SYS_DESC(SYS_MPAMVPM3_EL2), undef_access },
3814 { SYS_DESC(SYS_MPAMVPM4_EL2), undef_access },
3815 { SYS_DESC(SYS_MPAMVPM5_EL2), undef_access },
3816 { SYS_DESC(SYS_MPAMVPM6_EL2), undef_access },
3817 { SYS_DESC(SYS_MPAMVPM7_EL2), undef_access },
3820 { SYS_DESC(SYS_RVBAR_EL2), undef_access },
3821 { SYS_DESC(SYS_RMR_EL2), undef_access },
3833 { SYS_DESC(SYS_ICC_SRE_EL2), access_gic_sre },
3836 { SYS_DESC(SYS_ICH_VTR_EL2), access_gic_vtr },
3837 { SYS_DESC(SYS_ICH_MISR_EL2), access_gic_misr },
3838 { SYS_DESC(SYS_ICH_EISR_EL2), access_gic_eisr },
3839 { SYS_DESC(SYS_ICH_ELRSR_EL2), access_gic_elrsr },
3864 { SYS_DESC(SYS_CNTHP_TVAL_EL2), access_arch_timer },
3868 { SYS_DESC(SYS_CNTHV_TVAL_EL2), access_arch_timer, .visibility = cnthv_visibility },
3872 { SYS_DESC(SYS_CNTKCTL_EL12), access_cntkctl_el12 },
3874 { SYS_DESC(SYS_CNTP_TVAL_EL02), access_arch_timer },
3875 { SYS_DESC(SYS_CNTP_CTL_EL02), access_arch_timer },
3876 { SYS_DESC(SYS_CNTP_CVAL_EL02), access_arch_timer },
3878 { SYS_DESC(SYS_CNTV_TVAL_EL02), access_arch_timer },
3879 { SYS_DESC(SYS_CNTV_CTL_EL02), access_arch_timer },
3880 { SYS_DESC(SYS_CNTV_CVAL_EL02), access_arch_timer },
4200 SYS_DESC(OP_##insn), \
4205 { SYS_DESC(SYS_DC_ISW), access_dcsw },
4206 { SYS_DESC(SYS_DC_IGSW), access_dcgsw },
4207 { SYS_DESC(SYS_DC_IGDSW), access_dcgsw },
4216 { SYS_DESC(SYS_DC_CSW), access_dcsw },
4217 { SYS_DESC(SYS_DC_CGSW), access_dcgsw },
4218 { SYS_DESC(SYS_DC_CGDSW), access_dcgsw },
4219 { SYS_DESC(SYS_DC_CISW), access_dcsw },
4220 { SYS_DESC(SYS_DC_CIGSW), access_dcgsw },
4221 { SYS_DESC(SYS_DC_CIGDSW), access_dcgsw },
4635 { SYS_DESC(SYS_AARCH32_CNTP_TVAL), access_arch_timer },
4636 { SYS_DESC(SYS_AARCH32_CNTP_CTL), access_arch_timer },
4718 { SYS_DESC(SYS_AARCH32_CNTPCT), access_arch_timer },
4721 { SYS_DESC(SYS_AARCH32_CNTVCT), access_arch_timer },
4723 { SYS_DESC(SYS_AARCH32_CNTP_CVAL), access_arch_timer },
4724 { SYS_DESC(SYS_AARCH32_CNTPCTSS), access_arch_timer },
4725 { SYS_DESC(SYS_AARCH32_CNTVCTSS), access_arch_timer },