1595 static __always_inline void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)  in set_sysreg_masks()  function
1628 	set_sysreg_masks(kvm, VTTBR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1633 	set_sysreg_masks(kvm, VTCR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1638 	set_sysreg_masks(kvm, VMPIDR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1642 	set_sysreg_masks(kvm, HCR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1646 	set_sysreg_masks(kvm, HCRX_EL2, res0, res1);  in kvm_init_nv_sysregs()
1650 	set_sysreg_masks(kvm, HFGRTR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1652 	set_sysreg_masks(kvm, HFGWTR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1656 	set_sysreg_masks(kvm, HDFGRTR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1658 	set_sysreg_masks(kvm, HDFGWTR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1662 	set_sysreg_masks(kvm, HFGITR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1666 	set_sysreg_masks(kvm, HAFGRTR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1670 	set_sysreg_masks(kvm, HFGRTR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1672 	set_sysreg_masks(kvm, HFGWTR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1676 	set_sysreg_masks(kvm, HDFGRTR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1678 	set_sysreg_masks(kvm, HDFGWTR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1682 	set_sysreg_masks(kvm, HFGITR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1686 	set_sysreg_masks(kvm, TCR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1690 	set_sysreg_masks(kvm, SCTLR_EL1, res0, res1);  in kvm_init_nv_sysregs()
1694 	set_sysreg_masks(kvm, SCTLR2_EL1, res0, res1);  in kvm_init_nv_sysregs()
1696 	set_sysreg_masks(kvm, SCTLR2_EL2, res0, res1);  in kvm_init_nv_sysregs()
1700 	set_sysreg_masks(kvm, MDCR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1715 	set_sysreg_masks(kvm, CNTHCTL_EL2, res0, res1);  in kvm_init_nv_sysregs()
1724 	set_sysreg_masks(kvm, ICH_HCR_EL2, res0, res1);  in kvm_init_nv_sysregs()
1727 	set_sysreg_masks(kvm, VNCR_EL2, VNCR_EL2_RES0, VNCR_EL2_RES1);  in kvm_init_nv_sysregs()