Lines Matching full:res1
1351 void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *res1) in get_reg_fixed_bits() argument
1358 *res1 = HFGRTR_EL2_RES1; in get_reg_fixed_bits()
1362 *res1 = HFGWTR_EL2_RES1; in get_reg_fixed_bits()
1366 *res1 = HFGITR_EL2_RES1; in get_reg_fixed_bits()
1370 *res1 = HDFGRTR_EL2_RES1; in get_reg_fixed_bits()
1374 *res1 = HDFGWTR_EL2_RES1; in get_reg_fixed_bits()
1378 *res1 = HAFGRTR_EL2_RES1; in get_reg_fixed_bits()
1382 *res1 = HFGRTR2_EL2_RES1; in get_reg_fixed_bits()
1386 *res1 = HFGWTR2_EL2_RES1; in get_reg_fixed_bits()
1390 *res1 = HFGITR2_EL2_RES1; in get_reg_fixed_bits()
1394 *res1 = HDFGRTR2_EL2_RES1; in get_reg_fixed_bits()
1398 *res1 = HDFGWTR2_EL2_RES1; in get_reg_fixed_bits()
1402 *res1 = __HCRX_EL2_RES1; in get_reg_fixed_bits()
1408 *res1 = HCR_EL2_RES1 | (mask & fixed); in get_reg_fixed_bits()
1413 *res1 = SCTLR2_EL1_RES1; in get_reg_fixed_bits()
1417 *res1 = TCR2_EL2_RES1; in get_reg_fixed_bits()
1421 *res1 = SCTLR_EL1_RES1; in get_reg_fixed_bits()
1425 *res1 = MDCR_EL2_RES1; in get_reg_fixed_bits()
1429 *res0 = *res1 = 0; in get_reg_fixed_bits()