Lines Matching refs:regime
21 enum trans_regime regime; member
99 wi->regime = compute_translation_regime(vcpu, op); in setup_s1_walk()
104 if (wi->regime == TR_EL2 && va55) in setup_s1_walk()
107 wi->s2 = wi->regime == TR_EL10 && (hcr & (HCR_VM | HCR_DC)); in setup_s1_walk()
109 switch (wi->regime) { in setup_s1_walk()
129 tbi = (wi->regime == TR_EL2 ? in setup_s1_walk()
141 switch (wi->regime) { in setup_s1_walk()
178 wi->hpd &= (wi->regime == TR_EL2 ? in setup_s1_walk()
226 lva &= tcr & (wi->regime == TR_EL2 ? TCR_EL2_DS : TCR_DS); in setup_s1_walk()
230 lva &= tcr & (wi->regime == TR_EL2 ? TCR_EL2_DS : TCR_DS); in setup_s1_walk()
248 if (wi->regime != TR_EL2 && in setup_s1_walk()
261 ps = (wi->regime == TR_EL2 ? in setup_s1_walk()
680 enum trans_regime regime) in compute_par_s1() argument
695 if (regime == TR_EL10 && in compute_par_s1()
710 mair = (regime == TR_EL10 ? in compute_par_s1()
717 sctlr = (regime == TR_EL10 ? in compute_par_s1()
735 static bool pan3_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime) in pan3_enabled() argument
742 if (regime == TR_EL10) in pan3_enabled()
775 if (wi.regime != TR_EL2) { in handle_at_slow()
816 pan &= ur || uw || (pan3_enabled(vcpu, wi.regime) && ux); in handle_at_slow()
867 return compute_par_s1(vcpu, &wr, wi.regime); in handle_at_slow()