Lines Matching +full:fiq +full:- +full:based

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Based on arch/arm/kernel/setup.c
5  * Copyright (C) 1995-2001 Russell King
106  * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
116 	 * Pre-scan the list of MPIDRS and filter out bits that do
134 		fs[i] = affinity ? ffs(affinity) - 1 : 0;
135 		bits[i] = ls - fs[i];
148 	mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
149 	mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
152 				  fs[3] - (bits[2] + bits[1] + bits[0]);
186 			"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
193 		 * or else we could end-up printing non-initialized data, etc.
199 	/* Early fixups are done, map the FDT as read-only now */
218 	kernel_code.end     = __pa_symbol(__init_begin - 1);
220 	kernel_data.end     = __pa_symbol(_end - 1);
231 			res->name  = "reserved";
232 			res->flags = IORESOURCE_MEM;
233 			res->start = __pfn_to_phys(memblock_region_reserved_base_pfn(region));
234 			res->end = __pfn_to_phys(memblock_region_reserved_end_pfn(region)) - 1;
236 			res->name  = "System RAM";
237 			res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
238 			res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
239 			res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
254 		if (!memblock_is_region_reserved(mem->start, mem_size))
260 			start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start);
261 			end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end);
263 			if (start > mem->end || end < mem->start)
274 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
311 	 * IRQ and FIQ will be unmasked after the root irqchip has been
338 	/* Parse the ACPI tables for possible boot-time configuration */
373 		pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
385 	if (ops && ops->cpu_can_disable)
386 		return ops->cpu_can_disable(cpu);
433 		panic("Non-EFI boot detected with MMU and caches enabled");