26  * may result in a TAINT_CPU_OUT_OF_SPEC kernel taint, a capability mismatch
43  * - A "feature" is typically a 4-bit register field. A "capability" is the
1086 		if (WARN(caps->capability >= ARM64_NCAPS,  in init_cpucap_indirect_list_from_array()
1087 			"Invalid capability %d\n", caps->capability))  in init_cpucap_indirect_list_from_array()
1089 		if (WARN(cpucap_ptrs[caps->capability],  in init_cpucap_indirect_list_from_array()
1090 			"Duplicate entry for capability %d\n",  in init_cpucap_indirect_list_from_array()
1091 			caps->capability))  in init_cpucap_indirect_list_from_array()
1093 		cpucap_ptrs[caps->capability] = caps;  in init_cpucap_indirect_list_from_array()
2017 	 * unconditionally enable the capability to allow any late CPU  in has_hw_dbm()
2068 	 * the capability to allow any late CPU to use the feature.  in has_amu()
2221 	 * a chance to update the state, with the capability.  in has_address_auth_cpucap()
2410 /* Internal helper functions to match cpu capability type */
2470 		.capability = ARM64_ALWAYS_BOOT,
2475 		.capability = ARM64_ALWAYS_SYSTEM,
2481 		.capability = ARM64_HAS_GICV3_CPUIF,
2488 		.capability = ARM64_HAS_ECV,
2495 		.capability = ARM64_HAS_ECV_CNTPOFF,
2503 		.capability = ARM64_HAS_PAN,
2513 		.capability = ARM64_HAS_EPAN,
2522 		.capability = ARM64_HAS_LSE_ATOMICS,
2530 		.capability = ARM64_HAS_VIRT_HOST_EXTN,
2537 		.capability = ARM64_HAS_NESTED_VIRT,
2553 		.capability = ARM64_HAS_32BIT_EL0_DO_NOT_USE,
2561 		.capability = ARM64_HAS_32BIT_EL1,
2568 		.capability = ARM64_KVM_PROTECTED_MODE,
2574 		.capability = ARM64_HAS_HCX,
2582 		.capability = ARM64_UNMAP_KERNEL_AT_EL0,
2594 		.capability = ARM64_HAS_FPSIMD,
2603 		.capability = ARM64_HAS_DCPOP,
2610 		.capability = ARM64_HAS_DCPODP,
2620 		.capability = ARM64_SVE,
2629 		.capability = ARM64_HAS_RAS_EXTN,
2637 		.capability = ARM64_HAS_RASV1P1_EXTN,
2645 		.capability = ARM64_HAS_AMU_EXTN,
2655 		.capability = ARM64_HAS_CACHE_IDC,
2662 		.capability = ARM64_HAS_CACHE_DIC,
2669 		.capability = ARM64_HAS_STAGE2_FWB,
2676 		.capability = ARM64_HAS_ARMv8_4_TTL,
2682 		.capability = ARM64_HAS_TLB_RANGE,
2691 		.capability = ARM64_HW_DBM,
2708 		.capability = ARM64_HAFT,
2715 		.capability = ARM64_HAS_CRC32,
2722 		.capability = ARM64_SSBS,
2730 		.capability = ARM64_HAS_CNP,
2739 		.capability = ARM64_HAS_SB,
2747 		.capability = ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA5,
2754 		.capability = ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA3,
2761 		.capability = ARM64_HAS_ADDRESS_AUTH_IMP_DEF,
2767 		.capability = ARM64_HAS_ADDRESS_AUTH,
2773 		.capability = ARM64_HAS_GENERIC_AUTH_ARCH_QARMA5,
2780 		.capability = ARM64_HAS_GENERIC_AUTH_ARCH_QARMA3,
2787 		.capability = ARM64_HAS_GENERIC_AUTH_IMP_DEF,
2793 		.capability = ARM64_HAS_GENERIC_AUTH,
2804 		.capability = ARM64_HAS_GIC_PRIO_MASKING,
2812 		.capability = ARM64_HAS_GIC_PRIO_RELAXED_SYNC,
2820 		.capability = ARM64_HAS_E0PD,
2829 		.capability = ARM64_HAS_RNG,
2837 		.capability = ARM64_BTI,
2851 		.capability = ARM64_MTE,
2859 		.capability = ARM64_MTE_ASYMM,
2866 		.capability = ARM64_MTE_FAR,
2873 		.capability = ARM64_MTE_STORE_ONLY,
2881 		.capability = ARM64_HAS_LDAPR,
2889 		.capability = ARM64_HAS_FGT,
2896 		.capability = ARM64_HAS_FGT2,
2904 		.capability = ARM64_SME,
2909 	/* FA64 should be sorted after the base SME capability */
2913 		.capability = ARM64_SME_FA64,
2921 		.capability = ARM64_SME2,
2929 		.capability = ARM64_HAS_WFXT,
2936 		.capability = ARM64_HAS_TIDCP1,
2944 		.capability = ARM64_HAS_DIT,
2952 		.capability = ARM64_HAS_MOPS,
2959 		.capability = ARM64_HAS_TCR2,
2966 		.capability = ARM64_HAS_S1PIE,
2973 		.capability = ARM64_KVM_HVHE,
2979 		.capability = ARM64_HAS_EVT,
2986 		.capability = ARM64_HAS_BBML2_NOABORT,
2992 		.capability = ARM64_HAS_LPA2,
2999 		.capability = ARM64_HAS_FPMR,
3006 		.capability = ARM64_HAS_VA52,
3025 		.capability = ARM64_MPAM,
3033 		.capability = ARM64_MPAM_HCR,
3038 		.capability = ARM64_HAS_HCR_NV1,
3046 		.capability = ARM64_HAS_S1POE,
3056 		.capability = ARM64_HAS_GCS,
3066 		.capability = ARM64_HAS_PMUV3,
3073 		.capability = ARM64_HAS_SCTLR2,
3081 		.capability = ARM64_HAS_GICV5_CPUIF,
3088 		.capability = ARM64_HAS_GICV5_LEGACY,
3419 		caps_set = cpus_have_cap(caps->capability);  in update_cpu_capabilities()
3430 		 * A match-all CPUs capability is only set when probing the  in update_cpu_capabilities()
3439 				__clear_bit(caps->capability, system_cpucaps);  in update_cpu_capabilities()
3450 		__set_bit(caps->capability, system_cpucaps);  in update_cpu_capabilities()
3453 			set_bit(caps->capability, boot_cpucaps);  in update_cpu_capabilities()
3497 		    !cpus_have_cap(caps->capability))  in enable_cpu_capabilities()
3504 			 * will enable the capability as appropriate via  in enable_cpu_capabilities()
3506 			 * the boot CPU, for which the capability must be  in enable_cpu_capabilities()
3526  * If the system has already detected a capability, take necessary
3543 		system_has_cap = cpus_have_cap(caps->capability);  in verify_local_cpu_caps()
3562 			 * Check if the CPU has this capability if it isn't  in verify_local_cpu_caps()
3571 		pr_crit("CPU%d: Detected conflict for capability %d (%s), System: %d, CPU: %d\n",  in verify_local_cpu_caps()
3572 			smp_processor_id(), caps->capability,  in verify_local_cpu_caps()
3703  * Any new CPU should match the system wide status of the capability. If the
3704  * new CPU doesn't have a capability which the system now has enabled, we
3869 		    cpus_have_cap(caps->capability))  in setup_system_capabilities()