Lines Matching +full:el3 +full:-
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013 - ARM Ltd
28 /* Unallocated EC: 0x0F - 0x10 */
43 #define ESR_ELx_EC_IMP_DEF UL(0x1f) /* EL3 only */
53 /* Unallocated EC: 0x29 - 0x2B */
64 /* Unallocated EC: 0x36 - 0x37 */
70 /* Unallocated EC: 0x3D - 0x3F */
133 #define ESR_ELx_FSC_ADDRSZ_nL(n) ((n) == -1 ? 0x25 : 0x2C)
185 #define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1)
268 * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
319 * ISS field definitions for floating-point exception traps
468 (esr == ESR_ELx_FSC_FAULT_L(-1)); in esr_fsc_is_translation_fault()
499 (esr == ESR_ELx_FSC_ADDRSZ_L(-1)); in esr_fsc_is_addr_sz_fault()
510 (esr == ESR_ELx_FSC_SEA_TTW(-1)); in esr_fsc_is_sea_ttw()
521 (esr == ESR_ELx_FSC_SECC_TTW(-1)); in esr_fsc_is_secc_ttw()
530 /* Indicate which key is used for ERETAx (false: A-Key, true: B-Key) */