Lines Matching full:disable
108 mrs x0, pmcr_el0 // Disable debug access traps
192 msr_s SYS_ICH_HFGITR_EL2, x0 // Disable instruction traps
206 msr_s SYS_ICH_HFGRTR_EL2, x0 // Disable reg read traps
215 msr_s SYS_ICH_HFGWTR_EL2, x0 // Disable reg write traps
220 msr hstr_el2, xzr // Disable CP15 traps to EL2
239 msr cptr_el2, x0 // Disable copro. traps to EL2
265 /* Disable any fine grained traps */
275 /* Disable PMSNEVFR_EL1 read and write traps */
285 * Disable read traps for the following registers
293 * Disable write traps for the following registers
299 /* Disable read and write traps for [BRBCR|BRBFCR]_EL1 */
303 /* Disable read traps for BRBIDR_EL1 */
319 /* Disable traps for BRBIALL instruction */
322 /* Disable traps for BRBINJ instruction */
330 /* Disable nVHE traps of TPIDR2 and SMPRI */
339 /* Disable trapping of PIR_EL1 / PIRE0_EL1 */
348 /* Disable trapping of POR_EL0 */
357 /* Disable traps of access to GCS registers at EL0 and EL1 */
402 /* disable traps of PMSDSFR to EL2. */
482 // and disable lower traps
501 mrs x0, cpacr_el1 // Disable SVE traps
507 mrs x0, cptr_el2 // Disable SVE traps
522 mrs x0, cpacr_el1 // Disable SME traps
528 mrs x0, cptr_el2 // Disable SME traps
535 orr x1, x1, #SCTLR_ELx_ENTP2 // Disable TPIDR2 traps