Lines Matching +full:4 +full:x2
79 ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4
85 ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
123 ubfx \tmp, \tmp, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4
130 ubfx x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4
132 ccmp x0, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne
137 csel x2, xzr, x0, eq // all PMU counters from EL1
150 orr x2, x2, x0 // If we don't have VHE, then
155 ubfx x0, x1, #ID_AA64DFR0_EL1_TraceBuffer_SHIFT, #4
163 orr x2, x2, x0 // allow the EL1&0 translation
167 msr mdcr_el2, x2 // Configure debug traps
173 ubfx x0, x1, #ID_AA64MMFR1_EL1_LO_SHIFT, 4
187 ubfx x0, x0, #ID_AA64PFR0_EL1_GIC_SHIFT, #4
204 ubfx x0, x0, #ID_AA64PFR2_EL1_GCIE_SHIFT, #4
283 ubfx x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4
294 ubfx x1, x1, #ID_AA64MMFR0_EL1_FGT_SHIFT, #4
298 mov x2, xzr
303 orr x2, x2, #HDFGWTR_EL2_nPMSNEVFR_EL1_MASK
307 ubfx x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4
323 orr x2, x2, #HDFGWTR_EL2_nBRBDATA_MASK
327 orr x2, x2, #HDFGWTR_EL2_nBRBCTL_MASK
336 msr_s SYS_HDFGWTR_EL2, x2
339 mov x2, xzr
342 ubfx x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4
346 orr x2, x2, #HFGITR_EL2_nBRBIALL_MASK
349 orr x2, x2, #HFGITR_EL2_nBRBINJ_MASK
353 ubfx x1, x1, #ID_AA64PFR1_EL1_SME_SHIFT, #4
362 ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4
371 ubfx x1, x1, #ID_AA64MMFR3_EL1_S1POE_SHIFT, #4
380 ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
392 msr_s SYS_HFGITR_EL2, x2
395 ubfx x1, x1, #ID_AA64PFR0_EL1_AMU_SHIFT, #4
407 ubfx x1, x1, #ID_AA64MMFR0_EL1_FGT_SHIFT, #4
413 ubfx x1, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4
446 * Regs: x0, x1 and x2 are clobbered.
487 __check_override \idreg \fld 4 \pass \fail \tmp1 \tmp2
499 __check_override \idreg \fld 4 \pass \fail \tmp \ignore
504 check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .Lskip_mpam_\@, x1, x2
514 check_override id_aa64pfr1, ID_AA64PFR1_EL1_GCS_SHIFT, .Linit_gcs_\@, .Lskip_gcs_\@, x1, x2
521 check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2
542 check_override id_aa64pfr1, ID_AA64PFR1_EL1_SME_SHIFT, .Linit_sme_\@, .Lskip_sme_\@, x1, x2
569 …erride id_aa64smfr0, ID_AA64SMFR0_EL1_FA64_SHIFT, 1, .Linit_sme_fa64_\@, .Lskip_sme_fa64_\@, x1, x2
577 …verride id_aa64smfr0, ID_AA64SMFR0_EL1_SMEver_SHIFT, 4, .Linit_sme_zt0_\@, .Lskip_sme_zt0_\@, x1, …