25 #define ATOMIC_OP(op, asm_op, constraint)				\  argument
39 	: __stringify(constraint) "r" (i));				\
42 #define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\  argument
57 	: __stringify(constraint) "r" (i)				\
63 #define ATOMIC_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint) \  argument
78 	: __stringify(constraint) "r" (i)				\
112  * have a constraint for this, so fall back to register.  in ATOMIC_OPS()
121 #define ATOMIC64_OP(op, asm_op, constraint)				\  in ATOMIC_OPS()  argument
135 	: __stringify(constraint) "r" (i));				\  in ATOMIC_OPS()
138 #define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\  argument
153 	: __stringify(constraint) "r" (i)				\
159 #define ATOMIC64_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint)\  argument
174 	: __stringify(constraint) "r" (i)				\
208  * have a constraint for this, so fall back to register.
239 #define __CMPXCHG_CASE(w, sfx, name, sz, mb, acq, rel, cl, constraint)	\  argument
267 	: [old] __stringify(constraint) "r" (old), [new] "r" (new)	\
275  * handle the 'K' constraint for the value 4294967295 - thus we use no
276  * constraint for 32 bit operations.