Lines Matching full:macro

37 	.macro disable_daif
44 .macro save_and_disable_daif, flags
49 .macro save_and_disable_irq, flags
54 .macro restore_irq, flags
58 .macro disable_step_tsk, flgs, tmp
68 .macro enable_step_tsk, flgs, tmp
79 .macro esb
90 .macro csdb
97 .macro clearbhb
104 .macro sb
117 .macro nops, num
131 .macro ventry label
155 * Define a macro that constructs a 64-bit value by concatenating two
160 .macro regs_to_64, rd, lbits, hbits
162 .macro regs_to_64, rd, hbits, lbits
175 .macro adr_l, dst, sym
187 .macro ldr_l, dst, sym, tmp=
203 .macro str_l, src, sym, tmp
212 .macro get_this_cpu_offset, dst
216 .macro get_this_cpu_offset, dst
224 .macro set_this_cpu_offset, src
238 .macro adr_this_cpu, dst, sym, tmp
250 .macro ldr_this_cpu dst, sym, tmp
260 .macro read_ctr, reg
286 .macro raw_dcache_line_size, reg, tmp
296 .macro dcache_line_size, reg, tmp
307 .macro raw_icache_line_size, reg, tmp
317 .macro icache_line_size, reg, tmp
327 .macro tcr_set_t0sz, valreg, t0sz
334 .macro tcr_set_t1sz, valreg, t1sz
346 .macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1
361 .macro __dcache_op_workaround_clean_cache, op, addr
370 * Macro to perform a data cache maintenance for the interval
381 .macro dcache_by_myline_op op, domain, start, end, linesz, tmp, fixup
411 * Macro to perform a data cache maintenance for the interval
421 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
427 * Macro to perform an instruction cache maintenance for the interval
434 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
454 .macro load_ttbr1, pgtbl, tmp1, tmp2
468 .macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2
480 .macro reset_pmuserenr_el0, tmpreg
493 .macro reset_amuserenr_el0, tmpreg
503 .macro copy_page dest:req src:req t1:req t2:req t3:req t4:req t5:req t6:req t7:req t8:req
542 .macro le64sym, sym
552 .macro mov_q, reg, val
570 .macro get_current_task, rd
589 .macro offset_ttbr1, ttbr, tmp
606 .macro phys_to_ttbr, ttbr, phys
615 .macro phys_to_pte, pte, phys
627 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
647 .macro pre_disable_mmu_workaround
659 .macro frame_push, regcount:req, extra
669 .macro frame_pop
673 .macro __frame_regs, reg1, reg2, op, num
681 .macro __frame, op, regcount, extra=0
720 .macro set_sctlr, sreg, reg
733 .macro set_sctlr_el1, reg
737 .macro set_sctlr_el2, reg
748 .macro cond_yield, lbl:req, tmp:req, tmp2
766 .macro bti, targets
774 * This macro emits a program property note section identifying
792 .macro emit_aarch64_feature_1_and, feat=GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT
818 .macro emit_aarch64_feature_1_and, feat=0
823 .macro __mitigate_spectre_bhb_loop tmp
836 .macro mitigate_spectre_bhb_loop tmp
847 .macro __mitigate_spectre_bhb_fw
860 .macro mitigate_spectre_bhb_clear_insn