Lines Matching +full:ext +full:- +full:32 +full:k
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * SM4-GCM AEAD Algorithm using ARMv8 Crypto Extensions
14 #include "sm4-ce-asm.h"
16 .arch armv8-a+crypto
37 * output: r0:r1 (low 128-bits in r0, high in r1)
40 ext T0.16b, m1.16b, m1.16b, #8; \
46 ext T1.16b, RZERO.16b, T0.16b, #8; \
47 ext T0.16b, T0.16b, RZERO.16b, #8; \
55 ext T0.16b, m1.16b, m1.16b, #8; \
56 ext T2.16b, m3.16b, m3.16b, #8; \
57 ext T4.16b, m5.16b, m5.16b, #8; \
58 ext T6.16b, m7.16b, m7.16b, #8; \
79 ext T1.16b, RZERO.16b, T0.16b, #8; \
80 ext T3.16b, RZERO.16b, T2.16b, #8; \
81 ext T5.16b, RZERO.16b, T4.16b, #8; \
82 ext T7.16b, RZERO.16b, T6.16b, #8; \
83 ext T0.16b, T0.16b, RZERO.16b, #8; \
84 ext T2.16b, T2.16b, RZERO.16b, #8; \
85 ext T4.16b, T4.16b, RZERO.16b, #8; \
86 ext T6.16b, T6.16b, RZERO.16b, #8; \
97 * input: r0:r1 (low 128-bits in r0, high in r1)
102 ext T1.16b, T0.16b, RZERO.16b, #8; \
103 ext T0.16b, RZERO.16b, T0.16b, #8; \
111 ext T0.16b, m1.16b, m1.16b, #8; \
123 ext T1.16b, RZERO.16b, T0.16b, #8; \
125 ext T0.16b, T0.16b, RZERO.16b, #8; \
130 ext b0.16b, b0.16b, b0.16b, #8; \
140 ext T0.16b, m1.16b, m1.16b, #8; \
141 ext T2.16b, m3.16b, m3.16b, #8; \
142 ext T4.16b, m5.16b, m5.16b, #8; \
176 ext T1.16b, RZERO.16b, T0.16b, #8; \
177 ext T3.16b, RZERO.16b, T2.16b, #8; \
178 ext T5.16b, RZERO.16b, T4.16b, #8; \
182 ext T0.16b, T0.16b, RZERO.16b, #8; \
183 ext T2.16b, T2.16b, RZERO.16b, #8; \
184 ext T4.16b, T4.16b, RZERO.16b, #8; \
197 ext b0.16b, b0.16b, b0.16b, #8; \
198 ext b1.16b, b1.16b, b1.16b, #8; \
199 ext b2.16b, b2.16b, b2.16b, #8; \
212 bfi x9, x6, #0, #32; \
218 /* the lower 32-bits of initial IV is always be32(1) */ \
220 bfi x9, x6, #0, #32; \
236 /* can be the same as input v0-v3 */
274 /* H = E(K, 0^128) */
293 st1 {RH1.16b-RH4.16b}, [x1]
306 ld1 {RH1.16b-RH4.16b}, [x0]
322 ld1 {v0.16b-v3.16b}, [x2], #64
391 ld1 {RH1.16b-RH4.16b}, [x6]
415 ld1 {RTMP0.16b-RTMP3.16b}, [x2], #64
423 st1 {v0.16b-v3.16b}, [x1], #64
489 add x0, x0, #32
501 ext v0.16b, v0.16b, v0.16b, #1
563 /* v0-v2 for building CTRs, v3-v5 for saving inputs */
602 ld1 {RH1.16b-RH3.16b}, [x6]
620 ld1 {v3.16b-v5.16b}, [x2], #(3 * 16)
644 st1 {v0.16b-v2.16b}, [x1], #(3 * 16)
681 add x0, x0, #32
693 ext v0.16b, v0.16b, v0.16b, #1