Lines Matching +full:0 +full:x3ffc
42 memory@0 {
44 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
71 io-channels = <&u67 0>, <&u67 1>, <&u67 2>, <&u67 3>;
75 io-channels = <&u59 0>, <&u59 1>, <&u59 2>, <&u59 3>;
79 io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
83 io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
87 io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
91 io-channels = <&u69 0>, <&u69 1>, <&u69 2>, <&u69 3>;
95 io-channels = <&u66 0>, <&u66 1>, <&u66 2>, <&u66 3>;
99 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
103 io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
107 io-channels = <&u3 0>, <&u3 1>, <&u3 2>, <&u3 3>;
111 io-channels = <&u71 0>, <&u71 1>, <&u71 2>, <&u71 3>;
115 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
119 io-channels = <&u73 0>, <&u73 1>, <&u73 2>, <&u73 3>;
123 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
129 #clock-cells = <0>;
175 pinctrl-0 = <&pinctrl_gem3_default>;
178 #size-cells = <0>;
182 reg = <0xc>;
183 ti,rx-internal-delay = <0x8>;
184 ti,tx-internal-delay = <0xa>;
185 ti,fifo-depth = <0x1>;
195 pinctrl-0 = <&pinctrl_gpio_default>;
206 pinctrl-0 = <&pinctrl_i2c0_default>;
213 reg = <0x20>;
219 * 0 - MAX6643_OT_B
237 #size-cells = <0>;
238 reg = <0x75>;
239 i2c@0 {
241 #size-cells = <0>;
242 reg = <0>;
249 reg = <0x40>;
256 reg = <0x41>;
263 reg = <0x42>;
270 reg = <0x43>;
277 reg = <0x45>;
284 reg = <0x46>;
291 reg = <0x47>;
298 reg = <0x48>;
305 reg = <0x49>;
312 reg = <0x4a>;
319 reg = <0x4b>;
326 reg = <0x4c>;
333 reg = <0x4d>;
340 reg = <0x4e>;
346 #size-cells = <0>;
352 #size-cells = <0>;
356 reg = <0x43>;
360 reg = <0x44>;
364 reg = <0x45>;
366 /* u68 IR38064 +0 */
375 #size-cells = <0>;
386 pinctrl-0 = <&pinctrl_i2c1_default>;
394 #size-cells = <0>;
395 reg = <0x74>;
396 i2c@0 {
398 #size-cells = <0>;
399 reg = <0>;
403 * 0 - 256B address 0x54
404 * 256B - 512B address 0x55
405 * 512B - 768B address 0x56
406 * 768B - 1024B address 0x57
410 reg = <0x54>;
415 #size-cells = <0>;
419 reg = <0x36>;
422 #size-cells = <0>;
427 si5341_0: out@0 {
429 reg = <0>;
461 #size-cells = <0>;
464 #clock-cells = <0>;
466 reg = <0x5d>;
475 #size-cells = <0>;
478 #clock-cells = <0>;
480 reg = <0x5d>;
489 #size-cells = <0>;
495 #size-cells = <0>;
499 reg = <0x2f>;
512 #size-cells = <0>;
522 #size-cells = <0>;
523 reg = <0x75>;
525 i2c@0 {
527 #size-cells = <0>;
528 reg = <0>;
533 #size-cells = <0>;
539 #size-cells = <0>;
545 #size-cells = <0>;
551 #size-cells = <0>;
557 #size-cells = <0>;
563 #size-cells = <0>;
569 #size-cells = <0>;
786 clocks = <&si5341 0 0>, <&si5341 0 2>, <&si5341 0 3>;
792 flash@0 {
796 reg = <0x0>;
810 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
811 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
812 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
813 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
814 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
815 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
816 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
817 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
826 pinctrl-0 = <&pinctrl_sdhci1_default>;
838 pinctrl-0 = <&pinctrl_uart0_default>;
845 pinctrl-0 = <&pinctrl_usb0_default>;
847 phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
864 phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
865 <&psgtr 0 PHY_TYPE_DP 1 1>;