Lines Matching +full:0 +full:x3ffc

41 	memory@0 {
43 		reg = <0x0 0x0 0x0 0x80000000>;
48 		io-channels = <&u183 0>, <&u183 1>, <&u183 2>, <&u183 3>;
53 		#clock-cells = <0>;
59 		#clock-cells = <0>;
65 		#clock-cells = <0>;
73 	pinctrl-0 = <&pinctrl_can1_default>;
117 	pinctrl-0 = <&pinctrl_gem3_default>;
120 		#size-cells = <0>;
124 			reg = <0xc>;
125 			ti,rx-internal-delay = <0x8>;
126 			ti,tx-internal-delay = <0xa>;
127 			ti,fifo-depth = <0x1>;
146 	pinctrl-0 = <&pinctrl_i2c1_default>;
153 		reg = <0x20>;
159 		 * 0 - IRPS5401_ALERT_B
174 		#size-cells = <0>;
175 		reg = <0x74>;
176 		i2c@0 {
178 			#size-cells = <0>;
179 			reg = <0>;
183 			 *    0 - 256B address 0x54
184 			 * 256B - 512B address 0x55
185 			 * 512B - 768B address 0x56
186 			 * 768B - 1024B address 0x57
190 				reg = <0x54>;
198 			#size-cells = <0>;
205 			#size-cells = <0>;
209 				reg = <0x43>; /* pmbus / i2c 0x13 */
213 				reg = <0x44>; /* pmbus / i2c 0x14 */
219 			#size-cells = <0>;
224 				reg = <0x40>;
231 			#size-cells = <0>;
237 			#size-cells = <0>;
454 	flash@0 {
458 		reg = <0x0>;
472 	ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
473 	ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
474 	ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
475 	ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
476 	ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
477 	ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
478 	ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
479 	ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
489 	pinctrl-0 = <&pinctrl_sdhci1_default>;
497 	pinctrl-0 = <&pinctrl_uart0_default>;
503 	pinctrl-0 = <&pinctrl_uart1_default>;
510 	pinctrl-0 = <&pinctrl_usb0_default>;
512 	phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
545 	phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
546 	       <&psgtr 0 PHY_TYPE_DP 1 3>;