Lines Matching +full:0 +full:x3ffc
43 memory@0 {
45 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
71 io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>;
75 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
79 io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
83 io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>;
87 io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>;
91 io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>;
95 io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>;
99 io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>;
103 io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>;
107 io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>;
111 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
115 io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>;
119 io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>;
123 io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
127 io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>;
131 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
135 io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
139 io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
145 #clock-cells = <0>;
151 #clock-cells = <0>;
159 pinctrl-0 = <&pinctrl_can1_default>;
203 pinctrl-0 = <&pinctrl_gem3_default>;
206 #size-cells = <0>;
211 ti,rx-internal-delay = <0x8>;
212 ti,tx-internal-delay = <0xa>;
213 ti,fifo-depth = <0x1>;
223 pinctrl-0 = <&pinctrl_gpio_default>;
234 pinctrl-0 = <&pinctrl_i2c0_default>;
241 reg = <0x20>;
249 gpios = <0 0>;
250 output-low; /* PCIE = 0, DP = 1 */
255 gpios = <1 0>;
256 output-high; /* PCIE = 0, DP = 1 */
261 gpios = <2 0>;
262 output-high; /* PCIE = 0, USB0 = 1 */
267 gpios = <3 0>;
268 output-high; /* PCIE = 0, SATA = 1 */
275 reg = <0x21>;
287 #size-cells = <0>;
288 reg = <0x75>;
289 i2c@0 {
291 #size-cells = <0>;
292 reg = <0>;
298 reg = <0x40>;
305 reg = <0x41>;
312 reg = <0x42>;
319 reg = <0x43>;
326 reg = <0x44>;
333 reg = <0x45>;
340 reg = <0x46>;
347 reg = <0x47>;
354 reg = <0x4a>;
361 reg = <0x4b>;
367 #size-cells = <0>;
374 reg = <0x40>;
381 reg = <0x41>;
388 reg = <0x42>;
395 reg = <0x43>;
402 reg = <0x44>;
409 reg = <0x45>;
416 reg = <0x46>;
423 reg = <0x47>;
429 #size-cells = <0>;
434 reg = <0xa>;
438 reg = <0xb>;
442 reg = <0x10>;
446 reg = <0x13>;
450 reg = <0x14>;
454 reg = <0x15>;
458 reg = <0x16>;
462 reg = <0x17>;
466 reg = <0x18>;
470 reg = <0x1a>;
474 reg = <0x1d>;
479 reg = <0x20>;
483 reg = <0x72>;
487 reg = <0x73>;
498 pinctrl-0 = <&pinctrl_i2c1_default>;
507 #size-cells = <0>;
508 reg = <0x74>;
509 i2c@0 {
511 #size-cells = <0>;
512 reg = <0>;
516 * 0 - 256B address 0x54
517 * 256B - 512B address 0x55
518 * 512B - 768B address 0x56
519 * 768B - 1024B address 0x57
523 reg = <0x54>;
528 #size-cells = <0>;
532 reg = <0x36>;
535 #size-cells = <0>;
540 si5341_0: out@0 {
542 reg = <0>;
584 #size-cells = <0>;
587 #clock-cells = <0>;
589 reg = <0x5d>;
598 #size-cells = <0>;
601 #clock-cells = <0>;
603 reg = <0x5d>;
612 #size-cells = <0>;
622 #size-cells = <0>;
623 reg = <0x75>;
625 i2c@0 {
627 #size-cells = <0>;
628 reg = <0>;
633 #size-cells = <0>;
639 #size-cells = <0>;
645 #size-cells = <0>;
651 #size-cells = <0>;
657 #size-cells = <0>;
663 #size-cells = <0>;
669 #size-cells = <0>;
671 /* SEP 0 */
944 phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
950 clocks = <&si5341 0 5>, <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>;
956 flash@0 {
960 reg = <0x0>;
974 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
975 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
976 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
977 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
978 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
979 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
980 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
981 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
995 pinctrl-0 = <&pinctrl_sdhci1_default>;
1002 pinctrl-0 = <&pinctrl_uart0_default>;
1008 pinctrl-0 = <&pinctrl_uart1_default>;
1015 pinctrl-0 = <&pinctrl_usb0_default>;
1017 phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
1050 phys = <&psgtr 1 PHY_TYPE_DP 0 3>;