Lines Matching +full:0 +full:x3ffc
39 memory@0 {
41 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
46 #clock-cells = <0>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
100 pinctrl-0 = <&pinctrl_gem3_default>;
103 #size-cells = <0>;
104 phy0: ethernet-phy@0 {
105 reg = <0>;
113 pinctrl-0 = <&pinctrl_gpio_default>;
124 pinctrl-0 = <&pinctrl_i2c1_default>;
131 reg = <0x55>;
357 flash@0 {
361 reg = <0x0>;
375 ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
376 ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
377 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
378 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
379 ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
380 ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
381 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
382 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
391 pinctrl-0 = <&pinctrl_sdhci0_default>;
393 xlnx,mio-bank = <0>;
404 pinctrl-0 = <&pinctrl_sdhci1_default>;
411 pinctrl-0 = <&pinctrl_uart0_default>;
418 pinctrl-0 = <&pinctrl_usb0_default>;
420 phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
437 phys = <&psgtr 1 PHY_TYPE_DP 0 0>,
438 <&psgtr 0 PHY_TYPE_DP 1 1>;