Lines Matching +full:0 +full:x3ffc
33 io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
36 si5332_0: si5332-0 { /* u17 */
38 #clock-cells = <0>;
44 #clock-cells = <0>;
50 #clock-cells = <0>;
56 #clock-cells = <0>;
62 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #size-cells = <0>;
77 pinctrl-0 = <&pinctrl_i2c1_default>;
86 reg = <0x40>;
88 /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
102 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
103 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
104 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
105 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
106 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
107 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
108 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
109 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
117 phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
129 pinctrl-0 = <&pinctrl_usb0_default>;
131 phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
145 pinctrl-0 = <&pinctrl_sdhci1_default>;
161 pinctrl-0 = <&pinctrl_gem3_default>;
168 #size-cells = <0>;
366 pinctrl-0 = <&pinctrl_gpio0_default>;
372 pinctrl-0 = <&pinctrl_uart1_default>;