Lines Matching +full:am654 +full:- +full:vtm
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
23 bootph-all;
24 compatible = "ti,sci-pm-domain";
25 #power-domain-cells = <2>;
28 k3_clks: clock-controller {
29 bootph-all;
30 compatible = "ti,k2g-sci-clk";
31 #clock-cells = <2>;
34 k3_reset: reset-controller {
35 bootph-all;
36 compatible = "ti,sci-reset";
37 #reset-cells = <2>;
42 bootph-all;
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
49 bootph-all;
50 compatible = "ti,am654-chipid";
56 compatible = "ti,am654-secure-proxy";
57 #mbox-cells = <1>;
58 reg-names = "target_data", "rt", "scfg";
65 * firmware on non-MPU processors
71 compatible = "mmio-sram";
74 #address-cells = <1>;
75 #size-cells = <1>;
79 compatible = "pinctrl-single";
82 #pinctrl-cells = <1>;
83 pinctrl-single,register-width = <32>;
84 pinctrl-single,function-mask = <0xffffffff>;
88 compatible = "pinctrl-single";
91 #pinctrl-cells = <1>;
92 pinctrl-single,register-width = <32>;
93 pinctrl-single,function-mask = <0xffffffff>;
97 compatible = "pinctrl-single";
100 #pinctrl-cells = <1>;
101 pinctrl-single,register-width = <32>;
102 pinctrl-single,function-mask = <0xffffffff>;
106 compatible = "pinctrl-single";
109 #pinctrl-cells = <1>;
110 pinctrl-single,register-width = <32>;
111 pinctrl-single,function-mask = <0xffffffff>;
114 wkup_gpio_intr: interrupt-controller@42200000 {
115 compatible = "ti,sci-intr";
117 ti,intr-trigger-type = <1>;
118 interrupt-controller;
119 interrupt-parent = <&gic500>;
120 #interrupt-cells = <1>;
122 ti,sci-dev-id = <177>;
123 ti,interrupt-ranges = <16 960 16>;
128 compatible = "pinctrl-single";
130 #pinctrl-cells = <1>;
131 pinctrl-single,register-width = <32>;
132 pinctrl-single,function-mask = <0x0000000f>;
133 /* Non-MPU Firmware usage */
139 compatible = "pinctrl-single";
141 #pinctrl-cells = <1>;
142 pinctrl-single,register-width = <32>;
143 pinctrl-single,function-mask = <0x0000000f>;
144 /* Non-MPU Firmware usage */
149 compatible = "simple-bus";
150 #address-cells = <1>;
151 #size-cells = <1>;
154 cpsw_mac_syscon: ethernet-mac-syscon@200 {
155 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
160 compatible = "ti,am654-phy-gmii-sel";
162 #phy-cells = <1>;
167 compatible = "ti,am654-timer";
171 clock-names = "fck";
172 assigned-clocks = <&k3_clks 35 2>;
173 assigned-clock-parents = <&k3_clks 35 3>;
174 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
175 ti,timer-pwm;
176 /* Non-MPU Firmware usage */
181 bootph-all;
182 compatible = "ti,am654-timer";
186 clock-names = "fck";
187 assigned-clocks = <&k3_clks 117 2>;
188 assigned-clock-parents = <&k3_clks 117 3>;
189 power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
190 ti,timer-pwm;
191 /* Non-MPU Firmware usage */
196 compatible = "ti,am654-timer";
200 clock-names = "fck";
201 assigned-clocks = <&k3_clks 118 2>;
202 assigned-clock-parents = <&k3_clks 118 3>;
203 power-domains = <&k3_pds 118 TI_SCI_PD_EXCLUSIVE>;
204 ti,timer-pwm;
205 /* Non-MPU Firmware usage */
210 compatible = "ti,am654-timer";
214 clock-names = "fck";
215 assigned-clocks = <&k3_clks 119 2>;
216 assigned-clock-parents = <&k3_clks 119 3>;
217 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
218 ti,timer-pwm;
219 /* Non-MPU Firmware usage */
224 compatible = "ti,am654-timer";
228 clock-names = "fck";
229 assigned-clocks = <&k3_clks 120 2>;
230 assigned-clock-parents = <&k3_clks 120 3>;
231 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
232 ti,timer-pwm;
233 /* Non-MPU Firmware usage */
238 compatible = "ti,am654-timer";
242 clock-names = "fck";
243 assigned-clocks = <&k3_clks 121 2>;
244 assigned-clock-parents = <&k3_clks 121 3>;
245 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
246 ti,timer-pwm;
247 /* Non-MPU Firmware usage */
252 compatible = "ti,am654-timer";
256 clock-names = "fck";
257 assigned-clocks = <&k3_clks 122 2>;
258 assigned-clock-parents = <&k3_clks 122 3>;
259 power-domains = <&k3_pds 122 TI_SCI_PD_EXCLUSIVE>;
260 ti,timer-pwm;
261 /* Non-MPU Firmware usage */
266 compatible = "ti,am654-timer";
270 clock-names = "fck";
271 assigned-clocks = <&k3_clks 123 2>;
272 assigned-clock-parents = <&k3_clks 123 3>;
273 power-domains = <&k3_pds 123 TI_SCI_PD_EXCLUSIVE>;
274 ti,timer-pwm;
275 /* Non-MPU Firmware usage */
280 compatible = "ti,am654-timer";
284 clock-names = "fck";
285 assigned-clocks = <&k3_clks 124 2>;
286 assigned-clock-parents = <&k3_clks 124 3>;
287 power-domains = <&k3_pds 124 TI_SCI_PD_EXCLUSIVE>;
288 ti,timer-pwm;
289 /* Non-MPU Firmware usage */
294 compatible = "ti,am654-timer";
298 clock-names = "fck";
299 assigned-clocks = <&k3_clks 125 2>;
300 assigned-clock-parents = <&k3_clks 125 3>;
301 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
302 ti,timer-pwm;
303 /* Non-MPU Firmware usage */
308 compatible = "ti,j721e-uart", "ti,am654-uart";
312 clock-names = "fclk";
313 power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
318 compatible = "ti,j721e-uart", "ti,am654-uart";
322 clock-names = "fclk";
323 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
328 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
330 gpio-controller;
331 #gpio-cells = <2>;
332 interrupt-parent = <&wkup_gpio_intr>;
334 interrupt-controller;
335 #interrupt-cells = <2>;
337 ti,davinci-gpio-unbanked = <0>;
338 power-domains = <&k3_pds 167 TI_SCI_PD_EXCLUSIVE>;
340 clock-names = "gpio";
345 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
347 gpio-controller;
348 #gpio-cells = <2>;
349 interrupt-parent = <&wkup_gpio_intr>;
351 interrupt-controller;
352 #interrupt-cells = <2>;
354 ti,davinci-gpio-unbanked = <0>;
355 power-domains = <&k3_pds 168 TI_SCI_PD_EXCLUSIVE>;
357 clock-names = "gpio";
362 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
365 #address-cells = <1>;
366 #size-cells = <0>;
368 clock-names = "fck";
369 power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;
374 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
377 #address-cells = <1>;
378 #size-cells = <0>;
380 clock-names = "fck";
381 power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
386 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
389 #address-cells = <1>;
390 #size-cells = <0>;
392 clock-names = "fck";
393 power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
401 reg-names = "m_can", "message_ram";
402 power-domains = <&k3_pds 263 TI_SCI_PD_EXCLUSIVE>;
404 clock-names = "hclk", "cclk";
407 interrupt-names = "int0", "int1";
408 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
416 reg-names = "m_can", "message_ram";
417 power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>;
419 clock-names = "hclk", "cclk";
422 interrupt-names = "int0", "int1";
423 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
428 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
431 #address-cells = <1>;
432 #size-cells = <0>;
433 power-domains = <&k3_pds 384 TI_SCI_PD_EXCLUSIVE>;
439 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
442 #address-cells = <1>;
443 #size-cells = <0>;
444 power-domains = <&k3_pds 385 TI_SCI_PD_EXCLUSIVE>;
450 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
453 #address-cells = <1>;
454 #size-cells = <0>;
455 power-domains = <&k3_pds 386 TI_SCI_PD_EXCLUSIVE>;
461 bootph-all;
462 compatible = "simple-bus";
463 #address-cells = <2>;
464 #size-cells = <2>;
466 ti,sci-dev-id = <323>;
467 dma-coherent;
468 dma-ranges;
471 bootph-all;
472 compatible = "ti,am654-navss-ringacc";
478 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
479 ti,num-rings = <286>;
480 ti,sci-rm-range-gp-rings = <0x1>;
482 ti,sci-dev-id = <328>;
483 msi-parent = <&main_udmass_inta>;
486 mcu_udmap: dma-controller@285c0000 {
487 bootph-all;
488 compatible = "ti,j721e-navss-mcu-udmap";
495 reg-names = "gcfg", "rchanrt", "tchanrt",
497 msi-parent = <&main_udmass_inta>;
498 #dma-cells = <1>;
501 ti,sci-dev-id = <329>;
503 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
505 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
507 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
512 compatible = "ti,am654-secure-proxy";
513 #mbox-cells = <1>;
514 reg-names = "target_data", "rt", "scfg";
521 * firmware on non-MPU processors
527 compatible = "ti,j721e-cpsw-nuss";
528 #address-cells = <2>;
529 #size-cells = <2>;
531 reg-names = "cpsw_nuss";
533 dma-coherent;
535 clock-names = "fck";
536 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
547 dma-names = "tx0", "tx1", "tx2", "tx3",
552 ethernet-ports {
553 #address-cells = <1>;
554 #size-cells = <0>;
558 ti,mac-only;
560 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
566 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
568 #address-cells = <1>;
569 #size-cells = <0>;
571 clock-names = "fck";
576 compatible = "ti,am65-cpts";
579 clock-names = "cpts";
580 assigned-clocks = <&k3_clks 63 3>; /* CPTS_RFT_CLK */
581 assigned-clock-parents = <&k3_clks 63 5>; /* MAIN_0_HSDIV6_CLK */
582 interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
583 interrupt-names = "cpts";
584 ti,cpts-ext-ts-inputs = <4>;
585 ti,cpts-periodic-outputs = <2>;
590 compatible = "ti,j721s2-r5fss";
591 ti,cluster-mode = <1>;
592 #address-cells = <1>;
593 #size-cells = <1>;
596 power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
599 compatible = "ti,j721s2-r5f";
602 reg-names = "atcm", "btcm";
604 ti,sci-dev-id = <346>;
605 ti,sci-proc-ids = <0x01 0xff>;
607 firmware-name = "j784s4-mcu-r5f0_0-fw";
608 ti,atcm-enable = <1>;
609 ti,btcm-enable = <1>;
614 compatible = "ti,j721s2-r5f";
617 reg-names = "atcm", "btcm";
619 ti,sci-dev-id = <347>;
620 ti,sci-proc-ids = <0x02 0xff>;
622 firmware-name = "j784s4-mcu-r5f0_1-fw";
623 ti,atcm-enable = <1>;
624 ti,btcm-enable = <1>;
629 wkup_vtm0: temperature-sensor@42040000 {
630 compatible = "ti,j7200-vtm";
633 power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
634 #thermal-sensor-cells = <1>;
638 compatible = "ti,am3359-tscadc";
641 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
643 assigned-clocks = <&k3_clks 0 2>;
644 assigned-clock-rates = <60000000>;
645 clock-names = "fck";
648 dma-names = "fifo0", "fifo1";
652 #io-channel-cells = <1>;
653 compatible = "ti,am3359-adc";
658 compatible = "ti,am3359-tscadc";
661 power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
663 assigned-clocks = <&k3_clks 1 2>;
664 assigned-clock-rates = <60000000>;
665 clock-names = "fck";
668 dma-names = "fifo0", "fifo1";
672 #io-channel-cells = <1>;
673 compatible = "ti,am3359-adc";
678 compatible = "simple-bus";
679 #address-cells = <2>;
680 #size-cells = <2>;
688 compatible = "ti,am654-ospi", "cdns,qspi-nor";
692 cdns,fifo-depth = <256>;
693 cdns,fifo-width = <4>;
694 cdns,trigger-address = <0x0>;
696 assigned-clocks = <&k3_clks 161 7>;
697 assigned-clock-parents = <&k3_clks 161 9>;
698 assigned-clock-rates = <166666666>;
699 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
700 #address-cells = <1>;
701 #size-cells = <0>;
706 compatible = "ti,am654-ospi", "cdns,qspi-nor";
710 cdns,fifo-depth = <256>;
711 cdns,fifo-width = <4>;
712 cdns,trigger-address = <0x0>;
714 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
715 #address-cells = <1>;
716 #size-cells = <0>;
722 compatible = "ti,j721e-esm";
724 ti,esm-pins = <95>;
725 bootph-pre-ram;
729 compatible = "ti,j721e-esm";
731 ti,esm-pins = <63>;
732 bootph-pre-ram;
740 compatible = "ti,j7-rti-wdt";
743 power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>;
744 assigned-clocks = <&k3_clks 367 0>;
745 assigned-clock-parents = <&k3_clks 367 4>;
751 compatible = "ti,j7-rti-wdt";
754 power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>;
755 assigned-clocks = <&k3_clks 368 0>;
756 assigned-clock-parents = <&k3_clks 368 4>;