Lines Matching +full:d +full:- +full:cache +full:- +full:sets
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
47 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 i-cache-size = <0x8000>;
52 i-cache-line-size = <64>;
53 i-cache-sets = <256>;
54 d-cache-size = <0x8000>;
55 d-cache-line-size = <64>;
56 d-cache-sets = <128>;
57 next-level-cache = <&l2_0>;
59 #cooling-cells = <2>;
63 compatible = "arm,cortex-a53";
66 enable-method = "psci";
67 i-cache-size = <0x8000>;
68 i-cache-line-size = <64>;
69 i-cache-sets = <256>;
70 d-cache-size = <0x8000>;
71 d-cache-line-size = <64>;
72 d-cache-sets = <128>;
73 next-level-cache = <&l2_0>;
75 #cooling-cells = <2>;
79 compatible = "arm,cortex-a53";
82 enable-method = "psci";
83 i-cache-size = <0x8000>;
84 i-cache-line-size = <64>;
85 i-cache-sets = <256>;
86 d-cache-size = <0x8000>;
87 d-cache-line-size = <64>;
88 d-cache-sets = <128>;
89 next-level-cache = <&l2_0>;
91 #cooling-cells = <2>;
95 compatible = "arm,cortex-a53";
98 enable-method = "psci";
99 i-cache-size = <0x8000>;
100 i-cache-line-size = <64>;
101 i-cache-sets = <256>;
102 d-cache-size = <0x8000>;
103 d-cache-line-size = <64>;
104 d-cache-sets = <128>;
105 next-level-cache = <&l2_0>;
107 #cooling-cells = <2>;
111 l2_0: l2-cache0 {
112 compatible = "cache";
113 cache-unified;
114 cache-level = <2>;
115 cache-size = <0x80000>;
116 cache-line-size = <64>;
117 cache-sets = <512>;
122 compatible = "linaro,optee-tz";
127 compatible = "arm,psci-1.0";
132 a53_timer0: timer-cl0-cpu0 {
133 compatible = "arm,armv8-timer";
141 compatible = "arm,cortex-a53-pmu";
146 compatible = "simple-bus";
147 #address-cells = <2>;
148 #size-cells = <2>;
164 <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
165 <0x00 0x301C0000 0x00 0x301C0000 0x00 0x00001000>, /* DPHY-TX */
170 <0x00 0x30270000 0x00 0x30270000 0x00 0x00010000>, /* DSI-base1 */
171 <0x00 0x30500000 0x00 0x30500000 0x00 0x00100000>, /* DSI-base2 */
205 compatible = "simple-bus";
206 #address-cells = <2>;
207 #size-cells = <2>;
213 bootph-all;
217 compatible = "simple-bus";
218 #address-cells = <2>;
219 #size-cells = <2>;
225 bootph-all;
229 #include "k3-am62p-j722s-common-thermal.dtsi"
233 #include "k3-am62p-j722s-common-main.dtsi"
234 #include "k3-am62p-j722s-common-mcu.dtsi"
235 #include "k3-am62p-j722s-common-wakeup.dtsi"
238 #include "k3-j722s-main.dtsi"