Lines Matching +full:cdns +full:- +full:pcie +full:- +full:host
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
16 compatible = "ti,j721e-sk", "ti,j721e";
29 stdout-path = "serial2:115200n8";
34 bootph-all;
40 reserved_memory: reserved-memory {
41 #address-cells = <2>;
42 #size-cells = <2>;
48 no-map;
51 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
52 compatible = "shared-dma-pool";
54 no-map;
57 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
58 compatible = "shared-dma-pool";
60 no-map;
63 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
64 compatible = "shared-dma-pool";
66 no-map;
69 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
70 compatible = "shared-dma-pool";
72 no-map;
75 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
76 compatible = "shared-dma-pool";
78 no-map;
81 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
82 compatible = "shared-dma-pool";
84 no-map;
87 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
88 compatible = "shared-dma-pool";
90 no-map;
93 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
94 compatible = "shared-dma-pool";
96 no-map;
99 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
100 compatible = "shared-dma-pool";
102 no-map;
105 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
106 compatible = "shared-dma-pool";
108 no-map;
111 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
112 compatible = "shared-dma-pool";
114 no-map;
117 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
118 compatible = "shared-dma-pool";
120 no-map;
123 c66_0_dma_memory_region: c66-dma-memory@a6000000 {
124 compatible = "shared-dma-pool";
126 no-map;
129 c66_0_memory_region: c66-memory@a6100000 {
130 compatible = "shared-dma-pool";
132 no-map;
135 c66_1_dma_memory_region: c66-dma-memory@a7000000 {
136 compatible = "shared-dma-pool";
138 no-map;
141 c66_1_memory_region: c66-memory@a7100000 {
142 compatible = "shared-dma-pool";
144 no-map;
147 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
148 compatible = "shared-dma-pool";
150 no-map;
153 c71_0_memory_region: c71-memory@a8100000 {
154 compatible = "shared-dma-pool";
156 no-map;
159 rtos_ipc_memory_region: ipc-memories@aa000000 {
162 no-map;
166 vusb_main: fixedregulator-vusb-main5v0 {
168 compatible = "regulator-fixed";
169 regulator-name = "vusb-main5v0";
170 regulator-min-microvolt = <5000000>;
171 regulator-max-microvolt = <5000000>;
172 regulator-always-on;
173 regulator-boot-on;
176 vsys_3v3: fixedregulator-vsys3v3 {
178 compatible = "regulator-fixed";
179 regulator-name = "vsys_3v3";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 vin-supply = <&vusb_main>;
183 regulator-always-on;
184 regulator-boot-on;
187 vdd_mmc1: fixedregulator-sd {
188 compatible = "regulator-fixed";
189 pinctrl-names = "default";
190 pinctrl-0 = <&vdd_mmc1_en_pins_default>;
191 regulator-name = "vdd_mmc1";
192 regulator-min-microvolt = <3300000>;
193 regulator-max-microvolt = <3300000>;
194 regulator-boot-on;
195 enable-active-high;
196 vin-supply = <&vsys_3v3>;
200 vdd_sd_dv_alt: gpio-regulator-tps659411 {
201 compatible = "regulator-gpio";
202 pinctrl-names = "default";
203 pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
204 regulator-name = "tps659411";
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-boot-on;
208 vin-supply = <&vsys_3v3>;
214 transceiver1: can-phy1 {
216 #phy-cells = <0>;
217 max-bitrate = <5000000>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
220 standby-gpios = <&wkup_gpio0 3 GPIO_ACTIVE_HIGH>;
223 transceiver2: can-phy2 {
225 #phy-cells = <0>;
226 max-bitrate = <5000000>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&main_mcan0_gpio_pins_default>;
229 standby-gpios = <&main_gpio0 65 GPIO_ACTIVE_HIGH>;
232 transceiver3: can-phy3 {
234 #phy-cells = <0>;
235 max-bitrate = <5000000>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&main_mcan5_gpio_pins_default>;
238 standby-gpios = <&main_gpio0 66 GPIO_ACTIVE_HIGH>;
241 transceiver4: can-phy4 {
243 #phy-cells = <0>;
244 max-bitrate = <5000000>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&main_mcan9_gpio_pins_default>;
247 standby-gpios = <&main_gpio0 67 GPIO_ACTIVE_HIGH>;
250 dp_pwr_3v3: fixedregulator-dp-prw {
251 compatible = "regulator-fixed";
252 regulator-name = "dp-pwr";
253 regulator-min-microvolt = <3300000>;
254 regulator-max-microvolt = <3300000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&dp_pwr_en_pins_default>;
258 enable-active-high;
262 compatible = "dp-connector";
264 type = "full-size";
265 dp-pwr-supply = <&dp_pwr_3v3>;
269 remote-endpoint = <&dp0_out>;
274 hdmi-connector {
275 compatible = "hdmi-connector";
279 pinctrl-names = "default";
280 pinctrl-0 = <&hdmi_hpd_pins_default>;
282 ddc-i2c-bus = <&main_i2c1>;
285 hpd-gpios = <&main_gpio1 0 GPIO_ACTIVE_HIGH>;
289 remote-endpoint = <&tfp410_out>;
294 dvi-bridge {
297 pinctrl-names = "default";
298 pinctrl-0 = <&hdmi_pdn_pins_default>;
300 powerdown-gpios = <&main_gpio0 127 GPIO_ACTIVE_LOW>;
304 #address-cells = <1>;
305 #size-cells = <0>;
311 remote-endpoint = <&dpi1_out>;
312 pclk-sample = <1>;
320 remote-endpoint =
327 csi_mux: mux-controller {
328 compatible = "gpio-mux";
329 #mux-state-cells = <1>;
330 mux-gpios = <&main_gpio0 88 GPIO_ACTIVE_HIGH>;
331 idle-state = <0>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&main_csi_mux_sel_pins_default>;
338 main_mmc1_pins_default: main-mmc1-default-pins {
339 pinctrl-single,pins = <
349 bootph-all;
352 main_uart0_pins_default: main-uart0-default-pins {
353 pinctrl-single,pins = <
359 bootph-all;
362 main_uart1_pins_default: main-uart1-default-pins {
363 pinctrl-single,pins = <
369 main_i2c0_pins_default: main-i2c0-default-pins {
370 pinctrl-single,pins = <
376 main_i2c1_pins_default: main-i2c1-default-pins {
377 pinctrl-single,pins = <
383 main_i2c3_pins_default: main-i2c3-default-pins {
384 pinctrl-single,pins = <
390 main_usbss0_pins_default: main-usbss0-default-pins {
391 pinctrl-single,pins = <
395 bootph-all;
398 main_usbss1_pins_default: main-usbss1-default-pins {
399 pinctrl-single,pins = <
402 bootph-all;
405 main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
406 pinctrl-single,pins = <
411 main_mcan0_pins_default: main-mcan0-default-pins {
412 pinctrl-single,pins = <
418 main_mcan0_gpio_pins_default: main-mcan0-gpio-default-pins {
419 pinctrl-single,pins = <
424 main_mcan5_pins_default: main-mcan5-default-pins {
425 pinctrl-single,pins = <
431 main_mcan5_gpio_pins_default: main-mcan5-gpio-default-pins {
432 pinctrl-single,pins = <
437 main_mcan9_pins_default: main-mcan9-default-pins {
438 pinctrl-single,pins = <
444 main_mcan9_gpio_pins_default: main-mcan9-gpio-default-pins {
445 pinctrl-single,pins = <
450 dp0_pins_default: dp0-default-pins {
451 pinctrl-single,pins = <
456 dp_pwr_en_pins_default: dp-pwr-en-default-pins {
457 pinctrl-single,pins = <
462 dss_vout0_pins_default: dss-vout0-default-pins {
463 pinctrl-single,pins = <
495 hdmi_hpd_pins_default: hdmi-hpd-default-pins {
496 pinctrl-single,pins = <
501 hdmi_pdn_pins_default: hdmi-pdn-default-pins {
502 pinctrl-single,pins = <
508 ekey_reset_pins_default: ekey-reset-pns-default-pins {
509 pinctrl-single,pins = <
514 main_i2c5_pins_default: main-i2c5-default-pins {
515 pinctrl-single,pins = <
521 rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
522 pinctrl-single,pins = <
549 rpi_header_gpio1_pins_default: rpi-header-gpio1-default-pins {
550 pinctrl-single,pins = <
557 pmic_irq_pins_default: pmic-irq-default-pins {
558 pinctrl-single,pins = <
563 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
564 pinctrl-single,pins = <
580 mcu_mdio_pins_default: mcu-mdio1-default-pins {
581 pinctrl-single,pins = <
587 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
588 pinctrl-single,pins = <
601 bootph-all;
604 vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins {
605 pinctrl-single,pins = <
610 vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
611 pinctrl-single,pins = <
616 wkup_uart0_pins_default: wkup-uart0-default-pins {
617 pinctrl-single,pins = <
623 mcu_uart0_pins_default: mcu-uart0-default-pins {
624 pinctrl-single,pins = <
630 bootph-all;
633 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
634 pinctrl-single,pins = <
638 bootph-all;
641 mcu_mcan0_pins_default: mcu-mcan0-default-pins {
642 pinctrl-single,pins = <
648 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
649 pinctrl-single,pins = <
655 mkey_reset_pins_default: mkey-reset-pns-default-pins {
656 pinctrl-single,pins = <
665 pinctrl-names = "default";
666 pinctrl-0 = <&wkup_uart0_pins_default>;
667 bootph-all;
672 pinctrl-names = "default";
673 pinctrl-0 = <&wkup_i2c0_pins_default>;
674 clock-frequency = <400000>;
677 /* AT24C512C-MAHM-T */
683 compatible = "ti,tps6594-q1";
685 system-power-controller;
686 pinctrl-names = "default";
687 pinctrl-0 = <&pmic_irq_pins_default>;
688 interrupt-parent = <&wkup_gpio0>;
690 gpio-controller;
691 #gpio-cells = <2>;
692 ti,primary-pmic;
693 buck123-supply = <&vsys_3v3>;
694 buck4-supply = <&vsys_3v3>;
695 buck5-supply = <&vsys_3v3>;
696 ldo1-supply = <&vsys_3v3>;
697 ldo2-supply = <&vsys_3v3>;
698 ldo3-supply = <&vsys_3v3>;
699 ldo4-supply = <&vsys_3v3>;
703 regulator-name = "vdd_cpu_avs";
704 regulator-min-microvolt = <600000>;
705 regulator-max-microvolt = <900000>;
706 regulator-boot-on;
707 regulator-always-on;
708 bootph-pre-ram;
712 regulator-name = "vdd_mcu_0v85";
713 regulator-min-microvolt = <850000>;
714 regulator-max-microvolt = <850000>;
715 regulator-boot-on;
716 regulator-always-on;
720 regulator-name = "vdd_phyio_1v8";
721 regulator-min-microvolt = <1800000>;
722 regulator-max-microvolt = <1800000>;
723 regulator-boot-on;
724 regulator-always-on;
728 regulator-name = "vdd1_lpddr4_1v8";
729 regulator-min-microvolt = <1800000>;
730 regulator-max-microvolt = <1800000>;
731 regulator-boot-on;
732 regulator-always-on;
736 regulator-name = "vdd_mcuio_1v8";
737 regulator-min-microvolt = <1800000>;
738 regulator-max-microvolt = <1800000>;
739 regulator-boot-on;
740 regulator-always-on;
744 regulator-name = "vdda_dll_0v8";
745 regulator-min-microvolt = <800000>;
746 regulator-max-microvolt = <800000>;
747 regulator-boot-on;
748 regulator-always-on;
752 regulator-name = "vda_mcu_1v8";
753 regulator-min-microvolt = <1800000>;
754 regulator-max-microvolt = <1800000>;
755 regulator-boot-on;
756 regulator-always-on;
762 compatible = "ti,tps6594-q1";
764 system-power-controller;
765 interrupt-parent = <&wkup_gpio0>;
767 gpio-controller;
768 #gpio-cells = <2>;
769 buck1234-supply = <&vsys_3v3>;
770 buck5-supply = <&vsys_3v3>;
771 ldo1-supply = <&vsys_3v3>;
772 ldo2-supply = <&vsys_3v3>;
773 ldo3-supply = <&vsys_3v3>;
774 ldo4-supply = <&vsys_3v3>;
778 regulator-name = "vdd_core_0v8";
779 regulator-min-microvolt = <800000>;
780 regulator-max-microvolt = <800000>;
781 regulator-boot-on;
782 regulator-always-on;
786 regulator-name = "vdd_ram_0v85";
787 regulator-min-microvolt = <850000>;
788 regulator-max-microvolt = <850000>;
789 regulator-boot-on;
790 regulator-always-on;
794 regulator-name = "vdd_sd_dv";
795 regulator-min-microvolt = <1800000>;
796 regulator-max-microvolt = <3300000>;
797 regulator-boot-on;
798 regulator-always-on;
802 regulator-name = "vdd_usb_3v3";
803 regulator-min-microvolt = <3300000>;
804 regulator-max-microvolt = <3300000>;
805 regulator-boot-on;
806 regulator-always-on;
810 regulator-name = "vdd_io_1v8";
811 regulator-min-microvolt = <1800000>;
812 regulator-max-microvolt = <1800000>;
813 regulator-boot-on;
814 regulator-always-on;
818 regulator-name = "vda_pll_1v8";
819 regulator-min-microvolt = <1800000>;
820 regulator-max-microvolt = <1800000>;
821 regulator-boot-on;
822 regulator-always-on;
830 pinctrl-names = "default";
831 pinctrl-0 = <&mcu_uart0_pins_default>;
832 bootph-all;
837 pinctrl-names = "default";
838 pinctrl-0 = <&main_uart0_pins_default>;
840 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
841 bootph-all;
846 pinctrl-names = "default";
847 pinctrl-0 = <&main_uart1_pins_default>;
853 vmmc-supply = <&vdd_mmc1>;
854 vqmmc-supply = <&vdd_sd_dv_alt>;
855 pinctrl-names = "default";
856 pinctrl-0 = <&main_mmc1_pins_default>;
857 bootph-all;
858 ti,driver-strength-ohm = <50>;
859 disable-wp;
864 pinctrl-names = "default";
865 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
868 compatible = "jedec,spi-nor";
870 spi-tx-bus-width = <8>;
871 spi-rx-bus-width = <8>;
872 spi-max-frequency = <25000000>;
873 cdns,tshsl-ns = <60>;
874 cdns,tsd2d-ns = <60>;
875 cdns,tchsh-ns = <60>;
876 cdns,tslch-ns = <60>;
877 cdns,read-delay = <4>;
880 compatible = "fixed-partitions";
881 #address-cells = <1>;
882 #size-cells = <1>;
895 label = "ospi.u-boot";
922 bootph-all;
930 pinctrl-names = "default";
931 pinctrl-0 = <&main_i2c0_pins_default>;
932 clock-frequency = <400000>;
934 i2c-mux@71 {
936 #address-cells = <1>;
937 #size-cells = <0>;
942 #address-cells = <1>;
943 #size-cells = <0>;
949 #address-cells = <1>;
950 #size-cells = <0>;
958 pinctrl-names = "default";
959 pinctrl-0 = <&main_i2c1_pins_default>;
961 clock-frequency = <100000>;
966 pinctrl-names = "default";
967 pinctrl-0 = <&main_i2c3_pins_default>;
968 clock-frequency = <400000>;
970 i2c-mux@70 {
972 #address-cells = <1>;
973 #size-cells = <0>;
978 #address-cells = <1>;
979 #size-cells = <0>;
985 #address-cells = <1>;
986 #size-cells = <0>;
995 pinctrl-names = "default";
996 pinctrl-0 = <&main_i2c5_pins_default>;
997 clock-frequency = <400000>;
1002 pinctrl-names = "default";
1003 pinctrl-0 = <&rpi_header_gpio0_pins_default>;
1008 pinctrl-names = "default";
1009 pinctrl-0 = <&rpi_header_gpio1_pins_default>;
1017 idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
1018 bootph-all;
1022 idle-states = <J721E_SERDES0_LANE0_PCIE0_LANE0>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
1028 bootph-all;
1032 typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
1033 typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
1039 cdns,num-lanes = <2>;
1040 #phy-cells = <0>;
1041 cdns,phy-type = <PHY_TYPE_USB3>;
1050 cdns,phy-type = <PHY_TYPE_DP>;
1051 cdns,num-lanes = <4>;
1052 cdns,max-bit-rate = <5400>;
1053 #phy-cells = <0>;
1059 phy-names = "dpphy";
1060 pinctrl-names = "default";
1061 pinctrl-0 = <&dp0_pins_default>;
1065 pinctrl-names = "default";
1066 pinctrl-0 = <&main_usbss0_pins_default>;
1067 bootph-all;
1068 ti,vbus-divider;
1073 maximum-speed = "super-speed";
1075 phy-names = "cdns3,usb3-phy";
1076 bootph-all;
1082 cdns,num-lanes = <1>;
1083 #phy-cells = <0>;
1084 cdns,phy-type = <PHY_TYPE_USB3>;
1090 pinctrl-names = "default";
1091 pinctrl-0 = <&main_usbss1_pins_default>;
1092 bootph-all;
1093 ti,vbus-divider;
1097 dr_mode = "host";
1098 maximum-speed = "super-speed";
1100 phy-names = "cdns3,usb3-phy";
1101 bootph-all;
1105 pinctrl-names = "default";
1106 pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
1110 phy0: ethernet-phy@0 {
1112 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1113 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
1118 phy-mode = "rgmii-rxid";
1119 phy-handle = <&phy0>;
1123 pinctrl-names = "default";
1124 pinctrl-0 = <&dss_vout0_pins_default>;
1126 assigned-clocks = <&k3_clks 152 1>, /* VP 1 pixel clock */
1130 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
1137 #address-cells = <1>;
1138 #size-cells = <0>;
1144 remote-endpoint = <&dp0_in>;
1152 remote-endpoint = <&tfp410_in>;
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1164 remote-endpoint = <&dpi0_out>;
1171 remote-endpoint = <&dp_connector_in>;
1179 cdns,num-lanes = <1>;
1180 #phy-cells = <0>;
1181 cdns,phy-type = <PHY_TYPE_PCIE>;
1189 cdns,num-lanes = <2>;
1190 #phy-cells = <0>;
1191 cdns,phy-type = <PHY_TYPE_PCIE>;
1198 pinctrl-names = "default";
1199 pinctrl-0 = <&ekey_reset_pins_default>;
1200 reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_HIGH>;
1203 phy-names = "pcie-phy";
1204 num-lanes = <1>;
1209 pinctrl-names = "default";
1210 pinctrl-0 = <&mkey_reset_pins_default>;
1211 reset-gpios = <&wkup_gpio0 11 GPIO_ACTIVE_HIGH>;
1214 phy-names = "pcie-phy";
1215 num-lanes = <2>;
1219 pinctrl-names = "default";
1220 pinctrl-0 = <&mcu_mcan0_pins_default>;
1226 pinctrl-names = "default";
1227 pinctrl-0 = <&main_mcan0_pins_default>;
1233 pinctrl-names = "default";
1234 pinctrl-0 = <&main_mcan5_pins_default>;
1240 pinctrl-names = "default";
1241 pinctrl-0 = <&main_mcan9_pins_default>;
1254 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
1255 ti,mbox-rx = <0 0 0>;
1256 ti,mbox-tx = <1 0 0>;
1259 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
1260 ti,mbox-rx = <2 0 0>;
1261 ti,mbox-tx = <3 0 0>;
1269 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
1270 ti,mbox-rx = <0 0 0>;
1271 ti,mbox-tx = <1 0 0>;
1274 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
1275 ti,mbox-rx = <2 0 0>;
1276 ti,mbox-tx = <3 0 0>;
1284 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
1285 ti,mbox-rx = <0 0 0>;
1286 ti,mbox-tx = <1 0 0>;
1289 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
1290 ti,mbox-rx = <2 0 0>;
1291 ti,mbox-tx = <3 0 0>;
1299 mbox_c66_0: mbox-c66-0 {
1300 ti,mbox-rx = <0 0 0>;
1301 ti,mbox-tx = <1 0 0>;
1304 mbox_c66_1: mbox-c66-1 {
1305 ti,mbox-rx = <2 0 0>;
1306 ti,mbox-tx = <3 0 0>;
1314 mbox_c71_0: mbox-c71-0 {
1315 ti,mbox-rx = <0 0 0>;
1316 ti,mbox-tx = <1 0 0>;
1322 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
1328 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
1333 ti,cluster-mode = <0>;
1337 ti,cluster-mode = <0>;
1371 memory-region = <&main_r5fss0_core0_dma_memory_region>,
1377 memory-region = <&main_r5fss0_core1_dma_memory_region>,
1383 memory-region = <&main_r5fss1_core0_dma_memory_region>,
1389 memory-region = <&main_r5fss1_core1_dma_memory_region>,
1396 memory-region = <&c66_0_dma_memory_region>,
1403 memory-region = <&c66_1_dma_memory_region>,
1410 memory-region = <&c71_0_dma_memory_region>,