Lines Matching +full:am654 +full:- +full:vtm
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
26 k3_clks: clock-controller {
27 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
38 compatible = "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <1>;
43 cpsw_mac_syscon: ethernet-mac-syscon@200 {
44 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
49 compatible = "ti,am654-phy-gmii-sel";
51 #phy-cells = <1>;
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
62 compatible = "ti,am654-chipid";
68 compatible = "pinctrl-single";
71 #pinctrl-cells = <1>;
72 pinctrl-single,register-width = <32>;
73 pinctrl-single,function-mask = <0xffffffff>;
78 compatible = "pinctrl-single";
80 #pinctrl-cells = <1>;
81 pinctrl-single,register-width = <32>;
82 pinctrl-single,function-mask = <0x0000000f>;
83 /* Non-MPU Firmware usage */
89 compatible = "pinctrl-single";
91 #pinctrl-cells = <1>;
92 pinctrl-single,register-width = <32>;
93 pinctrl-single,function-mask = <0x0000000f>;
94 /* Non-MPU Firmware usage */
99 compatible = "mmio-sram";
102 #address-cells = <1>;
103 #size-cells = <1>;
107 compatible = "ti,am654-timer";
111 clock-names = "fck";
112 assigned-clocks = <&k3_clks 35 1>;
113 assigned-clock-parents = <&k3_clks 35 2>;
114 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
115 ti,timer-pwm;
116 /* Non-MPU Firmware usage */
121 compatible = "ti,am654-timer";
125 clock-names = "fck";
126 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 322 0>;
127 assigned-clock-parents = <&k3_clks 71 2>, <&k3_clks 322 1>;
128 power-domains = <&k3_pds 71 TI_SCI_PD_EXCLUSIVE>;
129 ti,timer-pwm;
130 /* Non-MPU Firmware usage */
135 compatible = "ti,am654-timer";
139 clock-names = "fck";
140 assigned-clocks = <&k3_clks 72 1>;
141 assigned-clock-parents = <&k3_clks 72 2>;
142 power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
143 ti,timer-pwm;
144 /* Non-MPU Firmware usage */
149 compatible = "ti,am654-timer";
153 clock-names = "fck";
154 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 323 0>;
155 assigned-clock-parents = <&k3_clks 73 2>, <&k3_clks 323 1>;
156 power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
157 ti,timer-pwm;
158 /* Non-MPU Firmware usage */
163 compatible = "ti,am654-timer";
167 clock-names = "fck";
168 assigned-clocks = <&k3_clks 74 1>;
169 assigned-clock-parents = <&k3_clks 74 2>;
170 power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
171 ti,timer-pwm;
172 /* Non-MPU Firmware usage */
177 compatible = "ti,am654-timer";
181 clock-names = "fck";
182 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 324 0>;
183 assigned-clock-parents = <&k3_clks 75 2>, <&k3_clks 324 1>;
184 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
185 ti,timer-pwm;
186 /* Non-MPU Firmware usage */
191 compatible = "ti,am654-timer";
195 clock-names = "fck";
196 assigned-clocks = <&k3_clks 76 1>;
197 assigned-clock-parents = <&k3_clks 76 2>;
198 power-domains = <&k3_pds 76 TI_SCI_PD_EXCLUSIVE>;
199 ti,timer-pwm;
200 /* Non-MPU Firmware usage */
205 compatible = "ti,am654-timer";
209 clock-names = "fck";
210 assigned-clocks = <&k3_clks 77 1>, <&k3_clks 325 0>;
211 assigned-clock-parents = <&k3_clks 77 2>, <&k3_clks 325 1>;
212 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
213 ti,timer-pwm;
214 /* Non-MPU Firmware usage */
219 compatible = "ti,am654-timer";
223 clock-names = "fck";
224 assigned-clocks = <&k3_clks 78 1>;
225 assigned-clock-parents = <&k3_clks 78 2>;
226 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
227 ti,timer-pwm;
228 /* Non-MPU Firmware usage */
233 compatible = "ti,am654-timer";
237 clock-names = "fck";
238 assigned-clocks = <&k3_clks 79 1>, <&k3_clks 326 0>;
239 assigned-clock-parents = <&k3_clks 79 2>, <&k3_clks 326 1>;
240 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
241 ti,timer-pwm;
242 /* Non-MPU Firmware usage */
246 compatible = "ti,j721e-uart", "ti,am654-uart";
249 clock-frequency = <48000000>;
250 power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
252 clock-names = "fclk";
257 compatible = "ti,j721e-uart", "ti,am654-uart";
260 clock-frequency = <96000000>;
261 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
263 clock-names = "fclk";
267 wkup_gpio_intr: interrupt-controller@42200000 {
268 compatible = "ti,sci-intr";
270 ti,intr-trigger-type = <1>;
271 interrupt-controller;
272 interrupt-parent = <&gic500>;
273 #interrupt-cells = <1>;
275 ti,sci-dev-id = <137>;
276 ti,interrupt-ranges = <16 960 16>;
280 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
282 gpio-controller;
283 #gpio-cells = <2>;
284 interrupt-parent = <&wkup_gpio_intr>;
286 interrupt-controller;
287 #interrupt-cells = <2>;
289 ti,davinci-gpio-unbanked = <0>;
290 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
292 clock-names = "gpio";
297 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
299 gpio-controller;
300 #gpio-cells = <2>;
301 interrupt-parent = <&wkup_gpio_intr>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
306 ti,davinci-gpio-unbanked = <0>;
307 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
309 clock-names = "gpio";
314 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
317 #address-cells = <1>;
318 #size-cells = <0>;
319 clock-names = "fck";
321 power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
326 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
329 #address-cells = <1>;
330 #size-cells = <0>;
331 clock-names = "fck";
333 power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
338 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
341 #address-cells = <1>;
342 #size-cells = <0>;
343 clock-names = "fck";
345 power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>;
350 compatible = "simple-bus";
351 #address-cells = <2>;
352 #size-cells = <2>;
360 hbmc_mux: mux-controller@47000004 {
361 compatible = "reg-mux";
363 #mux-control-cells = <1>;
364 mux-reg-masks = <0x0 0x2>; /* HBMC select */
368 compatible = "ti,am654-hbmc";
371 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
373 assigned-clocks = <&k3_clks 102 5>;
374 assigned-clock-rates = <333333333>;
375 #address-cells = <2>;
376 #size-cells = <1>;
377 mux-controls = <&hbmc_mux 0>;
382 compatible = "ti,am654-ospi", "cdns,qspi-nor";
386 cdns,fifo-depth = <256>;
387 cdns,fifo-width = <4>;
388 cdns,trigger-address = <0x0>;
390 assigned-clocks = <&k3_clks 103 0>;
391 assigned-clock-parents = <&k3_clks 103 2>;
392 assigned-clock-rates = <166666666>;
393 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
394 #address-cells = <1>;
395 #size-cells = <0>;
400 compatible = "ti,am654-ospi", "cdns,qspi-nor";
404 cdns,fifo-depth = <256>;
405 cdns,fifo-width = <4>;
406 cdns,trigger-address = <0x0>;
408 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
409 #address-cells = <1>;
410 #size-cells = <0>;
416 compatible = "ti,am3359-tscadc";
419 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
421 assigned-clocks = <&k3_clks 0 3>;
422 assigned-clock-rates = <60000000>;
423 clock-names = "fck";
426 dma-names = "fifo0", "fifo1";
430 #io-channel-cells = <1>;
431 compatible = "ti,am3359-adc";
436 compatible = "ti,am3359-tscadc";
439 power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
441 assigned-clocks = <&k3_clks 1 3>;
442 assigned-clock-rates = <60000000>;
443 clock-names = "fck";
446 dma-names = "fifo0", "fifo1";
450 #io-channel-cells = <1>;
451 compatible = "ti,am3359-adc";
456 compatible = "simple-bus";
457 #address-cells = <2>;
458 #size-cells = <2>;
460 dma-coherent;
461 dma-ranges;
463 ti,sci-dev-id = <232>;
466 compatible = "ti,am654-navss-ringacc";
472 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
473 ti,num-rings = <286>;
474 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
476 ti,sci-dev-id = <235>;
477 msi-parent = <&main_udmass_inta>;
480 mcu_udmap: dma-controller@285c0000 {
481 compatible = "ti,j721e-navss-mcu-udmap";
488 reg-names = "gcfg", "rchanrt", "tchanrt",
490 msi-parent = <&main_udmass_inta>;
491 #dma-cells = <1>;
494 ti,sci-dev-id = <236>;
497 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
499 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
501 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
506 compatible = "ti,am654-secure-proxy";
507 #mbox-cells = <1>;
508 reg-names = "target_data", "rt", "scfg";
515 * firmware on non-MPU processors
521 compatible = "ti,j721e-cpsw-nuss";
522 #address-cells = <2>;
523 #size-cells = <2>;
525 reg-names = "cpsw_nuss";
527 dma-coherent;
529 clock-names = "fck";
530 power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
541 dma-names = "tx0", "tx1", "tx2", "tx3",
545 ethernet-ports {
546 #address-cells = <1>;
547 #size-cells = <0>;
551 ti,mac-only;
553 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
559 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
561 #address-cells = <1>;
562 #size-cells = <0>;
564 clock-names = "fck";
569 compatible = "ti,am65-cpts";
572 clock-names = "cpts";
573 interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
574 interrupt-names = "cpts";
575 ti,cpts-ext-ts-inputs = <4>;
576 ti,cpts-periodic-outputs = <2>;
581 compatible = "ti,j721e-r5fss";
582 ti,cluster-mode = <1>;
583 #address-cells = <1>;
584 #size-cells = <1>;
587 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
590 compatible = "ti,j721e-r5f";
593 reg-names = "atcm", "btcm";
595 ti,sci-dev-id = <250>;
596 ti,sci-proc-ids = <0x01 0xff>;
598 firmware-name = "j7-mcu-r5f0_0-fw";
599 ti,atcm-enable = <1>;
600 ti,btcm-enable = <1>;
605 compatible = "ti,j721e-r5f";
608 reg-names = "atcm", "btcm";
610 ti,sci-dev-id = <251>;
611 ti,sci-proc-ids = <0x02 0xff>;
613 firmware-name = "j7-mcu-r5f0_1-fw";
614 ti,atcm-enable = <1>;
615 ti,btcm-enable = <1>;
624 reg-names = "m_can", "message_ram";
625 power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>;
627 clock-names = "hclk", "cclk";
630 interrupt-names = "int0", "int1";
631 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
639 reg-names = "m_can", "message_ram";
640 power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>;
642 clock-names = "hclk", "cclk";
645 interrupt-names = "int0", "int1";
646 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
651 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
654 #address-cells = <1>;
655 #size-cells = <0>;
656 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
662 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
665 #address-cells = <1>;
666 #size-cells = <0>;
667 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
673 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
676 #address-cells = <1>;
677 #size-cells = <0>;
678 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
683 wkup_vtm0: temperature-sensor@42040000 {
684 compatible = "ti,j721e-vtm";
688 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
689 #thermal-sensor-cells = <1>;
693 compatible = "ti,j721e-esm";
695 ti,esm-pins = <95>;
696 bootph-pre-ram;