Lines Matching +full:cdns +full:- +full:pcie +full:- +full:host
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
9 /dts-v1/;
11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16 #include <dt-bindings/phy/phy-cadence.h>
19 compatible = "beagle,j721e-beagleboneai64", "ti,j721e";
20 model = "BeagleBoard.org BeagleBone AI-64";
34 stdout-path = "serial2:115200n8";
44 reserved_memory: reserved-memory {
45 #address-cells = <2>;
46 #size-cells = <2>;
51 no-map;
54 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
55 compatible = "shared-dma-pool";
57 no-map;
60 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
61 compatible = "shared-dma-pool";
63 no-map;
66 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
67 compatible = "shared-dma-pool";
69 no-map;
72 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
73 compatible = "shared-dma-pool";
75 no-map;
78 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
79 compatible = "shared-dma-pool";
81 no-map;
84 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
85 compatible = "shared-dma-pool";
87 no-map;
90 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
91 compatible = "shared-dma-pool";
93 no-map;
96 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
97 compatible = "shared-dma-pool";
99 no-map;
102 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
103 compatible = "shared-dma-pool";
105 no-map;
108 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
109 compatible = "shared-dma-pool";
111 no-map;
114 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
115 compatible = "shared-dma-pool";
117 no-map;
120 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
121 compatible = "shared-dma-pool";
123 no-map;
126 c66_0_dma_memory_region: c66-dma-memory@a6000000 {
127 compatible = "shared-dma-pool";
129 no-map;
132 c66_0_memory_region: c66-memory@a6100000 {
133 compatible = "shared-dma-pool";
135 no-map;
138 c66_1_dma_memory_region: c66-dma-memory@a7000000 {
139 compatible = "shared-dma-pool";
141 no-map;
144 c66_1_memory_region: c66-memory@a7100000 {
145 compatible = "shared-dma-pool";
147 no-map;
150 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
151 compatible = "shared-dma-pool";
153 no-map;
156 c71_0_memory_region: c71-memory@a8100000 {
157 compatible = "shared-dma-pool";
159 no-map;
162 rtos_ipc_memory_region: ipc-memories@aa000000 {
165 no-map;
169 gpio_keys: gpio-keys {
170 compatible = "gpio-keys";
171 pinctrl-names = "default";
172 pinctrl-0 = <&sw_pwr_pins_default>;
174 button-1 {
180 button-2 {
188 compatible = "gpio-leds";
189 pinctrl-names = "default";
190 pinctrl-0 = <&led_pins_default>;
192 led-0 {
195 linux,default-trigger = "heartbeat";
198 led-1 {
201 linux,default-trigger = "mmc0";
204 led-2 {
207 linux,default-trigger = "cpu";
210 led-3 {
213 linux,default-trigger = "mmc1";
216 led-4 {
219 default-state = "off";
223 evm_12v0: regulator-0 {
225 compatible = "regulator-fixed";
226 regulator-name = "evm_12v0";
227 regulator-min-microvolt = <12000000>;
228 regulator-max-microvolt = <12000000>;
229 regulator-always-on;
230 regulator-boot-on;
233 vsys_3v3: regulator-1 {
235 compatible = "regulator-fixed";
236 regulator-name = "vsys_3v3";
237 regulator-min-microvolt = <3300000>;
238 regulator-max-microvolt = <3300000>;
239 vin-supply = <&evm_12v0>;
240 regulator-always-on;
241 regulator-boot-on;
244 vsys_5v0: regulator-2 {
246 compatible = "regulator-fixed";
247 regulator-name = "vsys_5v0";
248 regulator-min-microvolt = <5000000>;
249 regulator-max-microvolt = <5000000>;
250 vin-supply = <&evm_12v0>;
251 regulator-always-on;
252 regulator-boot-on;
255 vdd_mmc1: regulator-3 {
256 compatible = "regulator-fixed";
257 pinctrl-names = "default";
258 pinctrl-0 = <&sd_pwr_en_pins_default>;
259 regulator-name = "vdd_mmc1";
260 regulator-min-microvolt = <3300000>;
261 regulator-max-microvolt = <3300000>;
262 regulator-boot-on;
263 enable-active-high;
264 vin-supply = <&vsys_3v3>;
268 vdd_sd_dv_alt: regulator-4 {
269 compatible = "regulator-gpio";
270 pinctrl-names = "default";
271 pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
272 regulator-name = "tlv71033";
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <3300000>;
275 regulator-boot-on;
276 vin-supply = <&vsys_5v0>;
282 dp_pwr_3v3: regulator-5 {
283 compatible = "regulator-fixed";
284 pinctrl-names = "default";
285 pinctrl-0 = <&dp0_3v3_en_pins_default>;
286 regulator-name = "dp-pwr";
287 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <3300000>;
290 enable-active-high;
294 compatible = "dp-connector";
296 type = "full-size";
297 dp-pwr-supply = <&dp_pwr_3v3>;
301 remote-endpoint = <&dp0_out>;
308 led_pins_default: led-default-pins {
309 pinctrl-single,pins = <
318 main_mmc1_pins_default: main-mmc1-default-pins {
319 pinctrl-single,pins = <
331 main_uart0_pins_default: main-uart0-default-pins {
332 pinctrl-single,pins = <
338 sd_pwr_en_pins_default: sd-pwr-en-default-pins {
339 pinctrl-single,pins = <
344 vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
345 pinctrl-single,pins = <
350 main_usbss0_pins_default: main-usbss0-default-pins {
351 pinctrl-single,pins = <
352 J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 - USBC_DIR */
356 main_usbss1_pins_default: main-usbss1-default-pins {
357 pinctrl-single,pins = <
362 dp0_3v3_en_pins_default:dp0-3v3-en-default-pins {
363 pinctrl-single,pins = <
368 dp0_pins_default: dp0-default-pins {
369 pinctrl-single,pins = <
374 main_i2c0_pins_default: main-i2c0-default-pins {
375 pinctrl-single,pins = <
381 main_i2c1_pins_default: main-i2c1-default-pins {
382 pinctrl-single,pins = <
388 main_i2c2_pins_default: main-i2c2-default-pins {
389 pinctrl-single,pins = <
397 main_i2c3_pins_default: main-i2c3-default-pins {
398 pinctrl-single,pins = <
404 main_i2c4_pins_default: main-i2c4-default-pins {
405 pinctrl-single,pins = <
413 main_i2c5_pins_default: main-i2c5-default-pins {
414 pinctrl-single,pins = <
420 main_i2c6_pins_default: main-i2c6-default-pins {
421 pinctrl-single,pins = <
429 csi0_gpio_pins_default: csi0-gpio-default-pins {
430 pinctrl-single,pins = <
436 csi1_gpio_pins_default: csi1-gpio-default-pins {
437 pinctrl-single,pins = <
443 pcie1_rst_pins_default: pcie1-rst-default-pins {
444 pinctrl-single,pins = <
451 eeprom_wp_pins_default: eeprom-wp-default-pins {
452 pinctrl-single,pins = <
457 mcu_adc0_pins_default: mcu-adc0-default-pins {
458 pinctrl-single,pins = <
469 mcu_adc1_pins_default: mcu-adc1-default-pins {
470 pinctrl-single,pins = <
475 mikro_bus_pins_default: mikro-bus-default-pins {
476 pinctrl-single,pins = <
498 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
499 pinctrl-single,pins = <
515 mcu_mdio_pins_default: mcu-mdio1-default-pins {
516 pinctrl-single,pins = <
522 sw_pwr_pins_default: sw-pwr-default-pins {
523 pinctrl-single,pins = <
528 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
529 pinctrl-single,pins = <
535 wkup_uart0_pins_default: wkup-uart0-default-pins {
536 pinctrl-single,pins = <
542 mcu_usbss1_pins_default: mcu-usbss1-default-pins {
543 pinctrl-single,pins = <
552 pinctrl-names = "default";
553 pinctrl-0 = <&wkup_uart0_pins_default>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&main_uart0_pins_default>;
561 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
567 non-removable;
568 ti,driver-strength-ohm = <50>;
569 disable-wp;
575 vmmc-supply = <&vdd_mmc1>;
576 vqmmc-supply = <&vdd_sd_dv_alt>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&main_mmc1_pins_default>;
579 ti,driver-strength-ohm = <50>;
580 disable-wp;
585 pinctrl-names = "default";
586 pinctrl-0 = <&main_i2c0_pins_default>;
587 clock-frequency = <400000>;
592 pinctrl-names = "default";
593 pinctrl-0 = <&main_i2c1_pins_default>;
594 clock-frequency = <400000>;
600 pinctrl-names = "default";
601 pinctrl-0 = <&main_i2c2_pins_default>;
602 clock-frequency = <100000>;
607 pinctrl-names = "default";
608 pinctrl-0 = <&main_i2c3_pins_default>;
609 clock-frequency = <400000>;
615 pinctrl-names = "default";
616 pinctrl-0 = <&main_i2c4_pins_default>;
617 clock-frequency = <100000>;
622 pinctrl-names = "default";
623 pinctrl-0 = <&main_i2c5_pins_default>;
624 clock-frequency = <400000>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&main_i2c6_pins_default>;
632 clock-frequency = <100000>;
638 pinctrl-names = "default";
639 pinctrl-0 = <&wkup_i2c0_pins_default>;
640 clock-frequency = <400000>;
645 pinctrl-names = "default";
646 pinctrl-0 = <&eeprom_wp_pins_default>;
652 pinctrl-names = "default";
653 pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>,
659 pinctrl-names = "default";
660 pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>;
668 idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
672 idle-states = <J721E_SERDES0_LANE0_IP4_UNUSED>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
681 typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>;
682 typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
688 cdns,num-lanes = <2>;
689 #phy-cells = <0>;
690 cdns,phy-type = <PHY_TYPE_USB3>;
699 cdns,phy-type = <PHY_TYPE_DP>;
700 cdns,num-lanes = <4>;
701 cdns,max-bit-rate = <5400>;
702 #phy-cells = <0>;
708 phy-names = "dpphy";
709 pinctrl-names = "default";
710 pinctrl-0 = <&dp0_pins_default>;
714 pinctrl-names = "default";
715 pinctrl-0 = <&main_usbss0_pins_default>;
716 ti,vbus-divider;
721 maximum-speed = "super-speed";
723 phy-names = "cdns3,usb3-phy";
729 cdns,num-lanes = <1>;
730 #phy-cells = <0>;
731 cdns,phy-type = <PHY_TYPE_USB3>;
737 pinctrl-names = "default";
738 pinctrl-0 = <&main_usbss1_pins_default>, <&mcu_usbss1_pins_default>;
739 ti,vbus-divider;
743 dr_mode = "host";
744 maximum-speed = "super-speed";
746 phy-names = "cdns3,usb3-phy";
753 ti,adc-channels = <0 1 2 3 4 5 6>;
759 /* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */
761 ti,adc-channels = <0>;
766 pinctrl-names = "default";
767 pinctrl-0 = <&mcu_cpsw_pins_default>;
771 pinctrl-names = "default";
772 pinctrl-0 = <&mcu_mdio_pins_default>;
774 phy0: ethernet-phy@0 {
776 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
777 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
782 phy-mode = "rgmii-rxid";
783 phy-handle = <&phy0>;
790 * VP0 - DisplayPort SST
791 * VP1 - DPI0
792 * VP2 - DSI
793 * VP3 - DPI1
796 assigned-clocks = <&k3_clks 152 1>, /* VP 1 pixel clock */
800 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
809 remote-endpoint = <&dp0_in>;
815 #address-cells = <1>;
816 #size-cells = <0>;
821 remote-endpoint = <&dpi0_out>;
828 remote-endpoint = <&dp_connector_in>;
836 cdns,num-lanes = <1>;
837 #phy-cells = <0>;
838 cdns,phy-type = <PHY_TYPE_PCIE>;
846 cdns,num-lanes = <2>;
847 #phy-cells = <0>;
848 cdns,phy-type = <PHY_TYPE_PCIE>;
855 pinctrl-names = "default";
856 pinctrl-0 = <&pcie1_rst_pins_default>;
858 phy-names = "pcie-phy";
859 num-lanes = <2>;
860 max-link-speed = <3>;
861 reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>;
872 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
873 ti,mbox-rx = <0 0 0>;
874 ti,mbox-tx = <1 0 0>;
877 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
878 ti,mbox-rx = <2 0 0>;
879 ti,mbox-tx = <3 0 0>;
887 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
888 ti,mbox-rx = <0 0 0>;
889 ti,mbox-tx = <1 0 0>;
892 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
893 ti,mbox-rx = <2 0 0>;
894 ti,mbox-tx = <3 0 0>;
902 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
903 ti,mbox-rx = <0 0 0>;
904 ti,mbox-tx = <1 0 0>;
907 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
908 ti,mbox-rx = <2 0 0>;
909 ti,mbox-tx = <3 0 0>;
917 mbox_c66_0: mbox-c66-0 {
918 ti,mbox-rx = <0 0 0>;
919 ti,mbox-tx = <1 0 0>;
922 mbox_c66_1: mbox-c66-1 {
923 ti,mbox-rx = <2 0 0>;
924 ti,mbox-tx = <3 0 0>;
932 mbox_c71_0: mbox-c71-0 {
933 ti,mbox-rx = <0 0 0>;
934 ti,mbox-tx = <1 0 0>;
940 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
946 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
952 memory-region = <&main_r5fss0_core0_dma_memory_region>,
958 memory-region = <&main_r5fss0_core1_dma_memory_region>,
964 memory-region = <&main_r5fss1_core0_dma_memory_region>,
970 memory-region = <&main_r5fss1_core1_dma_memory_region>,
977 memory-region = <&c66_0_dma_memory_region>,
984 memory-region = <&c66_1_dma_memory_region>,
991 memory-region = <&c71_0_dma_memory_region>,